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參數(shù)資料
| 型號： | AD7703CR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| 中文描述： | 1-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | MS-013AC, SOIC-20 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 251K |
| 代理商： | AD7703CR |
AD7703
REV. D
–5–
DATA
VALID
t
15
HI-Z
SDATA
CS
Figure 5a. SEC Mode Data Hold Time
HI-Z
DB19
DB18
DB1
DB0
HI-Z
SCLK
SDATA
CLKIN
CS
HI-Z
t
7
t
8
t
5
t
9
t
4
t
8
HI-Z
Figure 6. SSC Mode Timing Diagram
DATA
VALID
t
10
HI-Z
SDATA
CS
Figure 4. SSC Mode Data Hold Time
HI-Z
DB18
DB1
DB0
HI-Z
SDATA
DRDY
CS
t
12
t
11
t
13
t
14
SCLK
t
16
DB19
Figure 5b. SEC Mode Timing Diagram
T E RMINOLOGY
LINE ARIT Y E RROR
T his is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. T he end-
points of the transfer function are zero-scale (not to be confused
with bipolar zero), a point 0.5 LSB below the first code transi-
tion (000 . . . 000 to 000 . . . 001) and full scale, a point 1.5 LSB
above the last code transition (111 . . . 110 to 111 . . . 111).
T he error is expressed as a percentage of full scale.
DIFFE RE NT IAL LINE ARIT Y E RROR
T his is the difference between any code’s actual width and the
ideal (1 LSB) width. Differential linearity error is expressed in
LSBs. A differential linearity specification of
±
1 LSB or less
guarantees monotonicity.
POSIT IVE FULL-SCALE E RROR
Positive full-scale error is the deviation of the last code transition
(111 . . . 110 to 111 . . . 111) from the ideal (V
REF
–3/2 LSBs).
It applies to both positive and negative analog input ranges.
UNIPOLAR OFFSE T E RROR
Unipolar offset error is the deviation of the first code transition
from the ideal (AGND + 0.5 LSB) when operating in the uni-
polar mode.
BIPOLAR ZE RO E RROR
T his is the deviation of the midscale transition (0111 . . . 111 to
1000 . . . 000) from the ideal (AGND – 0.5 LSB) when operat-
ing in the bipolar mode.
BIPOLAR NE GAT IVE FULL-SCALE E RROR
T his is the deviation of the first code transition from the ideal
(–V
REF
+ 0.5 LSB), when operating in the bipolar mode.
POSIT IVE FULL-SCALE OVE RRANGE
Positive full-scale overrange is the amount of overhead available
to handle input voltages greater than +V
REF
(for example, noise
peaks or excess voltages due to system gain errors in system cali-
bration routines) without introducing errors due to overloading
the analog modulator or overflowing the digital filter.
NE GAT IVE FULL-SCALE OVE RRANGE
T his is the amount of overhead available to handle voltages be-
low –V
REF
without overloading the analog modulator or over-
flowing the digital filter. Note that the analog input will accept
negative voltage peaks even in the unipolar mode.
OFFSE T CALIBRAT ION RANGE
In the system calibration modes (SC2 Low) the AD7703 cali-
brates its offset with respect to the A
IN
pin. T he offset calibra-
tion range specification defines the range of voltages that the
AD7701 can accept and still calibrate offset accurately.
FULL-SCALE CALIBRAT ION RANGE
T his is the range of voltages that the AD7703 can accept in the
system calibration mode and still calibrate full scale correctly.
INPUT SPAN
In system calibration schemes, two voltages applied in sequence
to the AD7703’s analog input define the analog input range.
T he input span specification defines the minimum and maxi-
mum input voltages from zero to full scale that the AD7703 can
accept and still calibrate gain accurately.
相關PDF資料 |
PDF描述 |
|---|---|
| AD7703SQ | LC2MOS 20-Bit A/D Converter |
| AD7705 | 3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs |
| AD7705BN | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| AD7705BR | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD7705BRU | 3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7703CR-REEL | 功能描述:IC ADC 20BIT LC2MOS MONO 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7703CRZ | 功能描述:IC ADC 20BIT LC2MOS MONO 20SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7703SQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 20-Bit A/D Converter |
| AD7705 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs |
| AD7705_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs |
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