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參數(shù)資料
| 型號： | AD7707EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V/5 V 610 V Input Range 1 mW 3-Channel 16-Bit Sigma-Delta ADC(316.51 k) |
| 中文描述： | 3伏/ 5伏610 V輸入范圍1毫瓦3通道16位Σ-Δ模數(shù)轉(zhuǎn)換器（316.51十一） |
| 文件頁數(shù)： | 10/40頁 |
| 文件大小： | 316K |
| 代理商： | AD7707EB |
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REV. A
AD7707
–10–
Table IV. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ +3 V
AIN1 and AIN2 Buffered Mode Only
Filter First
Notch and O/P
Data Rate
Typical Output RMS Noise in
m
V (Peak-to-Peak Resolution in Bits)
Gain of
Gain of
Gain of
2
4
8
–3dB
Frequency 1
Gain of
Gain of
16
Gain of
32
Gain of
64
Gain of
128
MCLK IN = 2.4576 MHz
10Hz
50Hz
60Hz
250Hz
500Hz
2.62Hz
13.1Hz
15.72Hz
65.5Hz
131Hz
1.80 (16)
4.1 (16)
5.1 (16)
50 (13)
275 (10.5) 125 (10.5)
1 (16)
2.4 (16)
3 (16)
27 (13)
0.7 (16)
1.5 (16)
1.8 (16)
12.3 (13)
80 (10.5)
0.41 (16)
1 (15.5)
1.1 (15.5)
6.4 (13)
39 (10.5)
0.41 (16)
0.91 (15)
0.94 (14.5) 0.94 (13.5) 0.99 (13)
4 (12.5)
2.7 (12.5)
16 (10.5)
8.9 (10.5)
0.41 (15)
0.89 (14)
0.41 (14)
0.86 (13)
0.41 (13)
0.83 (12)
0.99 (11.5)
1.8 (11)
4.2 (9.5)
2.2 (11.5)
5.2 (10)
MCLK IN = 1 MHz
4.05Hz
20Hz
25Hz
100Hz
200Hz
1.06Hz
5.24Hz
6.55Hz
26.2Hz
52.4Hz
1.75 (16)
4.21 (16)
5.15 (16)
46.1 (13)
282 (10.5) 123 (10.5)
1.18 (16)
2.5 (16)
2.8 (16)
24.3 (13)
0.67 (16)
1.48 (16)
1.8 (16)
13.6 (13)
66 (10.5)
0.44 (16)
1 (15.5)
1.15 (15.5) 1 (14.5)
6.71 (13)
35.3 (10.5) 14.8 (10.5) 9.91 (10.5) 5.48 (10)
0.41 (16)
0.94 (15)
0.44 (15)
0.96 (14)
1.02 (13.5) 0.96 (13)
2.54 (12.5) 2.3 (11.5)
0.43 (14)
0.89 (13)
0.43 (13)
0.86 (12)
1.03 (11.5)
2.15 (10.5)
4.01 (9.5)
4.1 (12.5)
OUTPUT NOISE FOR HIGH LEVEL INPUT CHANNEL AIN3 (5 V OPERATION)
Table V shows the AD7707 output rms noise and peak-to-peak resolution in unbuffered for the selectable notch and –3dB
frequencies for the part, as selected by FS0, FS1 and FS2 of the Clock Register. The numbers given are for the
±
10 V,
±
5 V, 0 to 5 V and 0 V to +10 V ranges with a V
REF
of +2.5 V, HBIAS = 2.5 V, HICOM = AGND and AV
DD
= 5 V. These
numbers are typical and are generated at an analog input voltage of 0 V. Table VI meanwhile shows the output rms noise and
peak-to-peak resolution in buffered mode.
It is important to note that these numbers represent the resolution for which there will be
no code flicker. They are not calculated based on rms noise but on peak-to-peak noise.
Operating the high level channel with a gain
of 2 in bipolar mode gives an operating range of
±
10 V. Operating at a gain of 2 in unipolar mode gives a range of 0 V to
+10 V. Operating the high level channel with a gain of 4 in bipolar mode gives the
±
5 V operating range. Operating at a gain
of 4 in unipolar mode gives an operating range of 0 V to +5 V. Noise for all input ranges is shown in Appendix 1. The out-
put noise comes from two sources. The first is the electrical noise in the semiconductor devices (device noise) used in the
implementation of the modulator. Secondly, when the analog input is converted into the digital domain, quantization noise
is added. The device noise is at a low level and is independent of frequency. The quantization noise starts at an even lower
level but rises rapidly with increasing frequency to become the dominant noise source. The numbers in the tables are given
for the bipolar input ranges. For the unipolar ranges the rms noise numbers will be the same as the bipolar range but the
peak-to-peak resolution is now based on half the signal range which effectively means losing 1 bit of resolution.
Table V. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ +5 V
AIN3 Unbuffered Mode Only
F
ilter First
Notch and O/P
Data Rate
6
10 V Range
RMS Noise
(
m
V)
6
5 V Range
0 V to +10 V Range
RMS Noise P-P (Bits)
(
m
V)
0 V to +5 V Range
RMS Noise P-P (Bits)
(
m
V)
–3dB
Frequency
P-P (Bits) RMS Noise
Resolution (
m
V)
P-P (Bits)
Resolution
Resolution
Resolution
MCLK IN = 2.4576 MHz
10Hz
50Hz
60Hz
250Hz
500Hz
2.62Hz
13.1Hz
15.72Hz
65.5Hz
131Hz
5.10
15.82
20.36
430
2350
16
16
16
13
10
3.52
9.77
12.29
212
1287
16
16
16
13
10
5.10
15.82
20.36
430
2350
16
16
16
12
9
3.52
9.77
12.29
212
1287
16
16
16
12
9
MCLK IN = 1 MHz
4.05Hz
20Hz
25Hz
100Hz
200Hz
1.06Hz
5.24Hz
6.55Hz
26.2Hz
52.4Hz
5.13
18.9
23.7
406
2184
16
16
16
13
10.5
3.53
13.25
15.3
174
1144
16
16
16
13
10.5
5.13
18.9
23.7
406
2184
16
16
16
12
9.5
3.53
13.25
15.3
174
1144
16
16
15.5
12
9.5
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