
REV. B
–3–
AD7755
Parameter
A Version
B Version
Unit
Test Conditions/Comments
POWER SUPPLY
AV
DD
For Specified Performance
5 V – 5%
5 V + 5%
5 V – 5%
5 V + 5%
Typically 2 mA
Typically 1.5 mA
4.75
5.25
4.75
5.25
3
2.5
4.75
5.25
4.75
5.25
3
2.5
V min
V max
V min
V max
mA max
mA max
DV
DD
AI
DD
DI
DD
NOTES
1
See Terminology section for explanation of specifications.
2
See Plots in Typical Performance Graphs.
3
Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1, 2
Parameter
t
13
t
2
t
t
3
t
5
t
6
A, B Versions
Unit
Test Conditions/Comments
275
See Table III
1/2 t
2
90
See Table IV
CLKIN/4
ms
sec
sec
ms
sec
sec
F1 and F2 Pulsewidth (Logic Low)
Output Pulse Period. See Transfer Function Section
Time Between F1 Falling Edge and F2 Falling Edge
CF Pulsewidth (Logic High)
CF Pulse Period. See Transfer Function Section
Minimum Time Between F1 and F2 Pulse
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter.
2
See Figure 1.
3
The pulsewidths of F1, F2 and CF are not fixed for higher output frequencies. See Frequency Outputs Section.
4
The CF pulse is always 18
μ
s in the high frequency mode. See Frequency Outputs section and Table IV.
Specifications subject to change without notice.
ORDERING GUIDE
Model
Package Description
Package Options
AD7755AAN
AD7755AARS
AD7755ABRS
EVAL-AD7755EB
AD7755AAN-REF AD7755 Reference Design PCB (See AN-559)
Plastic DIP
Shrink Small Outline Package
Shrink Small Outline Package
AD7755 Evaluation Board
N-24
RS-24
RS-24
(AV
DD
= DV
DD
= 5 V 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, T
MIN
to
T
MAX
= –40 C to +85 C)
.
t
2
.
t
3
t
4
.
t
5
.
t
6
t
1
F1
F2
CF
Figure 1. Timing Diagram for Frequency Outputs