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參數(shù)資料
| 型號(hào)： | AD7827BN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | ADC |
| 英文描述： | 14-Bit 48KSPS DAS with ADC, MUX, PGA and Internal Reference 28-SSOP -40 to 85 |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大小： | 185K |
| 代理商： | AD7827BN |
AD7827
–11–
REV. 0
MICROPROCE SSOR INT E RFACING
T he Serial Interface on the AD7827 allows the part to be con-
nected directly to a range of many different microprocessors and
microcontrollers. T his section explains how to interface the
AD7827 with some of the more common DSP serial interface
protocols.
AD7827 to T MS320C5x
T he serial interface on the T MS320C5x uses a continuous serial
clock and frame synchronization signals to synchronize the data
transfer operations with peripheral devices such as the AD7827.
A receive frame synchronization output has been supplied on
the AD7827 to allow easy interfacing with no extra gluing logic.
T he serial port of the T MS320C5x is set up to operate in Burst
Mode with internal CLK X (T X serial clock) and FSR (RX
frame sync). T he Serial Port Control register (SPC) must have
the following setup: F0 = 1, FSM = 1, MCM = 1. T he connec-
tion diagram is shown in Figure 16.
TMS320C5x*
CLKX
CLKR
DR
FSR
AD7827*
SCLK
D
OUT
RFS
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 16. Interfacing to the TMS320C5x
AD7827 to ADSP-21xx
T he ADSP-21xx family of DSPs are easily interfaced to the
AD7827 without the need for any extra gluing logic. T he
SPORT is operated in alternate framing mode. T he SPORT
control register should be set up as follows:
T FSW = RFSW = 1, Alternate Framing
INVRFS = INVT FS = 1, Active Low Frame Signal
DT YPE = 00, Right Justify Data
SLEN = 0111, 8-Bit Data Words
ISCLK = 1, Internal Serial Clock
T FSR = RFSR = 1, Frame Every Word
IRFS = 0, External Framing Signal
IT FS = 1, Internal Framing Signal
T he 8-bit data words will be right justified in the 16-bit serial
data registers when using this configuration. Figure 17 shows
the connection diagram.
ADSP-21xx*
DR
AD7827*
SCLK
D
OUT
RFS
RFS
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 17. Interfacing to the ADSP-21xx
AD7827 to DSP56xxx
T he connection diagram in Figure 18 shows how the AD7827
can be connected to the SSI (Synchronous Serial Interface) of
the DSP56xxx family of DSPs from Motorola. T he SSI is oper-
ated in Synchronous Mode (SYN bit in CRB = 1) with inter-
nally generated 1-bit clock period frame sync for both T X and
RX (FSL1 and FSL0 bits in CRB = 1 and 0 respectively).
DSP56xxx*
SRD
AD7827*
SCLK
D
OUT
SC2
RFS
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 18. Interfacing to the DSP56xxx
Microcontrollers
T he AD7827 may also be interfaced to many microcontrollers,
as a continuous serial clock is not essential. However, enough
time must be left for the conversion to be complete before
applying a burst of serial clocks to read out the data.
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