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參數資料
| 型號： | AD7827BN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 48KSPS DAS with ADC, MUX, PGA and Internal Reference 28-SSOP -40 to 85 |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數： | 7/12頁 |
| 文件大?。?/td> | 185K |
| 代理商： | AD7827BN |
AD7827
–7–
REV. 0
ADC T RANSFE R FUNCT ION
T he output coding of the AD 7827 is straight binary. T he
designed code transitions occur at successive integer L SB
values (i.e., 1 L SB, 2 L SBs, etc.). T he L SB size is = V
REF
/256
(V
DD
= 5 V) or the LSB size = (0.8 V
REF
)/256 (V
DD
= 3 V). T he
ideal transfer characteristic for the AD7827 is shown in Figure 6
below.
(V
= 5V)
1LSB = V
REF
/256
(V
DD
= 3V)
1LSB = 0.8V
REF
/256
1LSB (V
DD
= 5V) V
/2
(V
DD
= 3V) 0.8V
REF
/2
V
REF
/2+1.25V – 1LSB
0.8V
REF
/2+1V – 1LSB
(V
DD
= 5V) V
REF
/2 – 1.25V
(V
DD
= 3V) 0.8V
REF
/2 – 1V
11111111
111....110
111....000
10000000
000....111
000....010
000....001
00000000
A
Figure 6. Transfer Characteristic
ANALOG INPUT
T he AD7827 has a single input channel with an input range of
0 V to 2.5 V or 0 V to 2.0 V, depending on the supply voltage
(V
DD
). T his input range is automatically set up by an on-chip
“V
DD
detector” circuit. 5 V operation of the ADC is detected
when V
DD
exceeds 4.1 V and 3 V operation is detected when
V
DD
falls below 3.8 V. T his circuit also possesses a degree of
glitch rejection; for example, a glitch from 5.5 V to 2.7 V up to
60 ns wide will not trip the V
DD
detector.
Note: Although there is a V
REF
pin from which a voltage refer-
ence of 2.5 V may be sourced, or to which an external reference
may be applied, this does not provide an option of varying the value
of the voltage reference. As stated in the specifications for the
AD7827, the input voltage range at this pin is 2.5 V
±
2%.
Analog Input Structure
Figure 7 shows an equivalent circuit of the analog input struc-
ture of the AD7827. T he two diodes, D1 and D2, provide ESD
protection for the analog inputs. Care must be taken to ensure
that the analog input signal never exceeds the supply rails by
more than 200 mV. T his will cause these diodes to become
forward biased and start conducting current into the substrate.
T he maximum current these diodes can conduct without caus-
ing irreversible damage to the part is 20 mA. T he capacitor C2
in Figure 7 is typically about 4 pF and can mostly be attributed
to pin capacitance. T he resistor R1 is a lumped component
made up of the on resistance of several components including
that of the multiplexer and the track-and-hold. T his resistor is
typically about 310
. T he capacitor C1 is the track-and-hold
capacitor and has a capacitance of 0.5 pF. Switch 1 is the track-
and-hold switch, while Switch 2 is that of the sampling capaci-
tor as shown in Figures 2 and 3.
When in track phase, Switch 1 is closed and Switch 2 is in
Position A. When in hold mode, Switch 1 opens while Switch 2
remains in Position A. T he track-and-hold remains in hold
mode for 120 ns—see Circuit Description, after which it returns
to track mode and the ADC enters its conversion phase. At this
point Switch 1 opens and Switch 2 moves to Position B. At the
end of the conversion Switch 2 moves back to Position A.
V
DD
V
IN
D1
R1
310
V
D2
SW1
C1
0.5pF
A
B
SW2
C2
4pF
Figure 7. Equivalent Analog Input Circuit
T he on-chip track-and-hold can accommodate input frequen-
cies to 10 MHz, making the AD7827 ideal for subsampling
applications. When the AD7827 is converting a 10 MHz input
signal at a sampling rate of 1 MSPS, the effective number of
bits typically remains above seven corresponding to a signal-to-
noise ratio of 42 dBs as shown in Figure 8.
INPUT FREQUENCY – MHz
50
38
0.2
10
1
3
4
5
6
8
48
46
44
42
40
F
SAMPLE
= 1MHz
S
Figure 8. SNR vs. Input Frequency On the AD7827
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