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參數資料
| 型號： | AD7851AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, MO-095AG, DIP-24 |
| 文件頁數： | 12/36頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AD7851AN |
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AD7851
–12–
REV. A
CALIBRAT ION RE GIST E RS
T he AD7851 has 10 calibration registers in all, 8 for the DAC, 1 for the offset and 1 for gain. Data can be written to or read from all
10 calibration registers. In self and system calibration the part automatically modifies the calibration registers; only if the user needs
to modify the calibration registers should an attempt be made to read from and write to the calibration registers.
Addressing the Calibration Registers
T he calibration selection bits in the control register CALSLT 1 and CALSLT 0 determine which of the calibration registers are ad-
dressed (see T able IV). T he addressing applies to both the read and write operations for the calibration registers. T he user should
not attempt to read from and write to the calibration registers at the same time.
T able IV. Calibration Register Addressing
CALSLT 1 CALSLT 0
Comment
0
0
1
1
0
1
0
1
T his combination addresses the
Gain (1)
,
Offset (1)
and
DAC Registers (8)
. T en registers in total.
T his combination addresses the
Gain (1)
and
Offset (1)
Registers. T wo registers in total.
T his combination addresses the
Offset Register
. One register in total.
T his combination addresses the
Gain Register
. One register in total.
Writing to/Reading from the Calibration Registers
For writing to the calibration registers a write to the control reg-
ister is required to set the CALSLT 0 and CALSLT 1 bits. For
reading from the calibration registers a write to the control reg-
ister is required to set the CALSLT 0 and CALSLT 1 bits, but
also to set the RDSLT 1 and RDSLT 0 bits to 10 (this addresses
the calibration registers for reading). T he calibration register
pointer is reset on writing to the control register setting the
CALSLT 1 and CALSLT 0 bits, or upon completion of all the
calibration register write/read operations. When reset it points
to the first calibration register in the selected write/read
sequence. T he calibration register pointer will point to the gain
calibration register upon reset in all but one case, this case be-
ing where the offset calibration register is selected on its own
(CALSLT 1 = 1, CALSLT 0 = 0). Where more than one cali-
bration register is being accessed, the calibration register
pointer will be automatically incremented after each calibration
register write/read operation. T he order in which the 10 calibra-
tion registers are arranged is shown in Figure 7. T he user may
abort at any time before all the calibration register write/read
operations are completed, and the next control register write
operation will reset the calibration register pointer. T he flow-
chart in Figure 8 shows the sequence for writing to the calibra-
tion registers and Figure 9 for reading.
CAL REGISTER
ADDRESS POINTER
CALIBRATION REGISTERS
GAIN REGISTER
OFFSET REGISTER
DAC 1st MSB REGISTER
DAC 8th MSB REGISTER
(1)
(2)
(3)
(10)
CALIBRATION REGISTER ADDRESS POINTER POSITION IS
DETERMINED BY THE NUMBER OF CALIBRATION REGISTERS
ADDRESSED AND THE NUMBER OF READ/WRITE OPERATIONS.
Figure 7. Calibration Register Arrangement
When reading from the calibration registers there will always be
two leading zeros for each of the registers. When operating in
serial Interface Mode 1, the read operations to the calibration
registers cannot be aborted. T he full number of read operations
must be completed (see section on serial Interface Mode 1 tim-
ing for more detail).
START
WRITE TO CAL REGISTER
(ADDR1 = 1, ADDR0 = 0)
FINISHED
LAST
REGISTER
WRITE
OPERATION
OR
ABORT
YES
NO
CAL REGISTER POINTER IS
AUTOMATICALLY RESET
WRITE TO CONTROL REGISTER SETTING STCAL = 0
AND CALSLT1, CALSLT0 = 00, 01, 10, 11
CAL REGISTER POINTER IS
AUTOMATICALLY INCREMENTED
Figure 8. Flowchart for Writing to the Calibration Registers
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