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參數資料
| 型號： | AD7854 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit Sampling ADC(單電源,200kSPS 12位采樣A/D轉換器) |
| 中文描述： | 12位采樣ADC（單電源，速度高達200ksps的12位采樣的A / D轉換器） |
| 文件頁數： | 20/28頁 |
| 文件大小： | 268K |
| 代理商： | AD7854 |
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AD7854/AD7854L
–20–
REV. 0
CALIBRAT ION SE CT ION
Calibration Overview
T he automatic calibration that is performed on power-up
ensures that the calibration options covered in this section are
not required in a significant number of applications. A calibra-
tion does not have to be initiated unless the operating condi-
tions change (CLK IN frequency, analog input mode, reference
voltage, temperature, and supply voltages). T he AD7854/
AD7854L has a number of calibration features that may be
required in some applications, and there are a number of advan-
tages in performing these different types of calibration. First, the
internal errors in the ADC can be reduced significantly to give
superior dc performance; and second, system offset and gain
errors can be removed. T his allows the user to remove reference
errors (whether it be internal or external reference) and to make
use of the full dynamic range of the AD7854/AD7854L by
adjusting the analog input range of the part for a specific system.
T here are two main calibration modes on the AD7854/
AD7854L, self-calibration and system calibration. T here are
various options in both self-calibration and system calibration as
outlined previously in T able III. All the calibration functions
are initiated by writing to the control register and setting the
ST CAL bit to 1.
T he duration of each of the different types of calibration is given
in T able IX for the AD7854 with a 4 MHz master clock. T hese
calibration times are master clock dependent. T herefore the
calibration times for the AD7854L (CLK IN = 1.8 MHz) are
larger than those quoted in T able VIII.
T able VIII. Calibration T imes (AD7854 with 4 MHz CLKIN)
T ype of Self-Calibration or System Calibration
T ime
Full
Gain + Offset
Offset
Gain
31.25 ms
6.94 ms
3.47 ms
3.47 ms
Automatic Calibration on Power-On
T he automatic calibration on power-on is initiated by the first
CONVST
pulse after the AV
DD
and DV
DD
power on. From the
CONVST
pulse the part internally sets a 32/72 ms (4 MHz/
1.8 MHz CLK IN) timeout. T his time is large enough to ensure
that the internal reference has settled before the calibration is
performed. However, if an external reference is being used, this
reference must have stabilized before the automatic calibration
is initiated. T his first
CONVST
pulse also triggers the BUSY
signal high, and once the 32/72 ms has elapsed, the BUSY sig-
nal goes low. At this point the next
CONVST
pulse that is ap-
plied initiates the automatic full self-calibration. T his
CONVST
pulse again triggers the BUSY signal high, and after 32/72 ms
(4 MHz/1.8 MHz CLK IN), the calibration is completed and the
BUSY signal goes low. T his timing arrangement is shown in
Figure 28. T he times in Figure 28 assume a 4 MHz/1.8 MHz
CL K IN signal.
AV
DD
= DV
DD
CONVST
BUSY
POWER ON
32/72 ms
TIMEOUT PERIOD
AUTOMATIC
CALIBRATION
DURATION
32/72 ms
CONVERSION IS INITIATED
ON THIS EDGE
Figure 28. Timing Arrangement for Autocalibration on
Power-On
T he
CONVST
signal is gated with the BUSY internally so that
as soon as the timeout is initiated by the first
CONVST
pulse all
subsequent
CONVST
pulses are ignored until the BUSY signal
goes low, 32/72 ms later. T he
CONVST
pulse that follows after
the BUSY signal goes low initiates an automatic full self-
calibration. T his takes a further 32/72 ms. After calibration,
the part is accurate to the 12-bit level and the specifications
quoted on the data sheet apply, and all subsequent
CONVST
pulses initiate conversions. T here is no need to perform another
calibration unless the operating conditions change or unless a
system calibration is required.
T his autocalibration at power-on is disabled if the user writes to
the control register before the autocalibration is initiated. If the
control register write operation occurs during the first 32/72 ms
timeout period, then the BUSY signal stays high for the 32/72
ms and the
CONVST
pulse that follows the BUSY going low
does not initiate an automatic full self-calibration. It initiates a
conversion and all subsequent
CONVST
pulses initiate conver-
sions as well. If the control register write operation occurs when
the automatic full self-calibration is in progress, then the cali-
bration is not be aborted; the BUSY signal remains high until
the automatic full self-calibration is complete.
Self-Calibration Description
T here are four different calibration options within the self-
calibration mode. T here is a full self-calibration where the
DAC, internal offset, and internal gain errors are removed.
T here is the (Gain + Offset) self-calibration which removes the
internal gain error and then the internal offset errors. T he inter-
nal DAC is not calibrated here. Finally, there are the self-offset
and self-gain calibrations which remove the internal offset errors
and the internal gain errors respectively.
T he internal capacitor DAC is calibrated by trimming each of
the capacitors in the DAC. It is the ratio of these capacitors to
each other that is critical, and so the calibration algorithm
ensures that this ratio is at a specific value by the end of the
calibration routine. For the offset and gain there are two
separate capacitors, one of which is trimmed during offset
calibration and one of which is trimmed during gain calibration.
In bipolar mode the midscale error is adjusted by an offset cali-
bration and the positive full-scale error is adjusted by the gain
calibration. In unipolar mode the zero-scale error is adjusted by
the offset calibration and the positive full-scale error is adjusted
by the gain calibration.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7854AD | 制造商:Analog Devices 功能描述: |
| AD7854AQ | 功能描述:IC ADC 12BIT PARALLEL LP 28-CDIP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7854AR | 功能描述:IC ADC 12BIT PARALLEL LP 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7854AR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Parallel 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 200KSPS 12-BIT PARALLEL 28SOIC W - Tape and Reel |
| AD7854ARS | 功能描述:IC ADC 12BIT PARALLEL LP 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
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