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參數(shù)資料
型號: AD7854LAQ
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
封裝: 0.600 INCH, CERDIP-28
文件頁數(shù): 15/28頁
文件大小: 264K
代理商: AD7854LAQ
AD7854/AD7854L
REV. B
15
Transfer Functions
For the unipolar range the designed code transitions occur
midway between successive integer LSB values (i.e., 1/2 LSB,
3/2 LSBs, 5/2 LSBs . . . FS
3/2 LSBs). The output coding is
straight binary for the unipolar range with 1
LSB = FS
/4096
=
3.3
V/
4096
=
0.8
mV
when
V
REF
= 3.3
V
. The ideal input/
output transfer characteristic for the unipolar range is shown in
Figure 14.
OUTPUT
CODE
111...111
111...110
111...101
111...100
000...011
000...010
000...001
000...000
0V 1LSB
V
IN
= (AIN(+)
AIN(
)), INPUT VOLTAGE
+FS
1LSB
1LSB =4096
Figure 14. AD7854/AD7854L Unipolar Transfer
Characteristic
Figure 13 shows the AD7854/AD7854L
s
±
V
REF
/2 bipolar ana-
log input configuration. AIN(+) cannot go below 0 V, so for the
full bipolar range, AIN(
) should be biased to at least +V
REF
/2.
Once again the designed code transitions occur midway between
successive integer LSB values. The output coding is twos
complement with 1
LSB =
4096
=
3.3
V
/4096
=
0.8
mV
. The
ideal input/output transfer characteristic is shown in Figure 15.
OUTPUT
CODE
011...111
011...110
000...001
111...111
000...000
000...010
000...001
000...000
V
IN
= (AIN(+)
AIN(
)), INPUT VOLTAGE
1LSB =4096
0V
(V
REF
/2)
1LSB
(V
REF
/2) + 1 LSB
V
REF
/2
+ FS
1LSB
FS = V
REF
V
Figure 15. AD7854/AD7854L Bipolar Transfer Characteristic
Input Ranges
The analog input range for the AD7854/AD7854L is 0 V to
V
REF
in both the unipolar and bipolar ranges.
The only difference between the unipolar range and the bipolar
range is that in the bipolar range the AIN(
) should be biased
up to at least +V
REF
/2 and the output coding is twos comple-
ment (see Table V and Figures 14 and 15).
Table V. Analog Input Connections
Analog Input
Range
0 V to V
REF1
±
V
REF
/2
2
Input Connections
AIN(+)
Connection
Diagram
AIN(–)
V
IN
V
IN
AGND
V
REF
/2
Figure 12
Figure 13
NOTES
1
Output code format is straight binary.
2
Range is
±
V
REF
/2 biased about V
REF
/2. Output code format is twos complement.
Note that the AIN(
) pin on the AD7854/AD7854L can be
biased up above AGND in the unipolar mode, or above V
REF
/2
in bipolar mode if required. The advantage of biasing the lower
end of the analog input range away from AGND is that the analog
input does not have to swing all the way down to AGND. Thus,
in single supply applications the input amplifier does not have to
swing all the way down to AGND. The upper end of the analog
input range is shifted up by the same amount. Care must be
taken so that the bias applied does not shift the upper end of the
analog input above the AV
DD
supply. In the case where the ref-
erence is the supply, AV
DD
, the AIN(
) should be tied to AGND
in unipolar mode or to AV
DD
/2 in bipolar mode.
. . .
AIN(+)
AIN(
)
V
IN
= 0 TO V
REF
TRACK AND HOLD
AMPLIFIER
DB0
DB11
STRAIGHT
BINARY
FORMAT
AD7854/AD7854L
Figure 12. 0 to V
REF
Unipolar Input Configuration
2
S
COMPLEMENT
FORMAT
V
REF
/2
. . .
AIN(+)
AIN(
)
V
IN
= 0 TO V
REF
TRACK AND HOLD
AMPLIFIER
DB0
DB11
AD7854/AD7854L
Figure 13.
±
V
REF
/2 about V
REF
/2 Bipolar Input Configuration
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