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參數(shù)資料
| 型號(hào)： | AD7854LAQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28 |
| 封裝： | 0.600 INCH, CERDIP-28 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大小： | 264K |
| 代理商： | AD7854LAQ |
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AD7854/AD7854L
–
6
–
REV. B
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
1
CONVST
Convert Start. Logic input. A low to high transition on this input puts the track/hold into its hold
mode and starts conversion. When this input is not used, it should be tied to DV
DD
.
Write Input. Active low logic input. Used in conjunction with
CS
and HBEN to write to internal registers.
Read Input. Active low logic input. Used in conjunction with
CS
and HBEN to read from internal
registers.
Chip Select Input. Active low logic input. The device is selected when this input is active.
Reference Input/Output. This pin is connected to the internal reference through a series resistor and is the
reference source for the analog-to-digital converter. The nominal reference voltage is 2.5 V and this appears
at the pin. This pin can be overdriven by an external reference and can be taken as high as AV
DD
. When
this pin is tied to AV
DD
, then the C
REF1
pin should also be tied to AV
DD
.
Analog Positive Supply Voltage, +3.0 V to +5.5 V.
Analog Ground. Ground reference for track/hold, reference and DAC.
Reference Capacitor (0.1
μ
F multilayer ceramic). This external capacitor is used as a charge source for the
internal DAC. The capacitor should be tied between the pin and AGND.
Reference Capacitor (0.01
μ
F ceramic disc). This external capacitor is used in conjunction with the on-chip
reference. The capacitor should be tied between the pin and AGND.
Analog Input. Positive input of the pseudo-differential analog input. Cannot go below AGND or above
AV
DD
at any time, and cannot go below AIN(–) when the unipolar input range is selected.
Analog Input. Negative input of the pseudo-differential analog input. Cannot go below AGND or above
AV
DD
at any time.
High Byte Enable Input. The AD7854 operates in byte mode only but outputs 12 bits of data during a read
cycle with HBEN low. When HBEN is high, then the high byte of data that is written to or read from the
part is on DB0 to DB7. When HBEN is low, then the lowest byte of data being written to the part is on
DB0 to DB7. If reading from the part with HBEN low, then the lowest 12 bits of data appear on pins DB0
to DB11. This allows a single read from the ADC or from the control register in a 16-bit bus system.
However, two reads are needed to access the calibration registers. Also, two writes are necessary to write to
any of the registers.
2
3
WR
RD
4
5
CS
REF
IN
/
REF
OUT
6
7
8
AV
DD
AGND
C
REF1
9
C
REF2
10
AIN(+)
11
AIN(–)
12
HBEN
13–21
DB0–DB8
Data Bits 0 to 8. Three state data I/O pins that are controlled by
CS
,
RD
,
WR
and HBEN. Data output is
straight binary (unipolar mode) or twos complement (bipolar mode).
Digital Supply Voltage, +3.0 V to +5.5 V.
Digital Ground. Ground reference point for digital circuitry.
Data Bits 9 to 11. Three state data output pins that are controlled by
CS
,
RD
and HBEN. Data output is
straight binary (unipolar mode) or twos complement (bipolar mode). These output pins should be tied to
DV
DD
via 100 k
resistors when the AD7854/AD7854L is being interfaced to an 8-bit data bus.
Master Clock Signal for the device (4 MHz for AD7854, 1.8 MHz for AD7854L). Sets the conversion and
calibration times.
Busy Output. The busy output is triggered high by the falling edge of
CONVST
and remains high until
conversion is completed. BUSY is also used to indicate when the AD7854/AD7854L has completed its on-
chip calibration sequence.
22
23
24–26
DV
DD
DGND
DB9–DB11
27
CLKIN
28
BUSY
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7854LAR | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7854ARS | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7854AQ | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7854SQ | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7854L* | 3.3V/5V Low Power RS232 3-Driver/5-Receiver Transceiver; Package: SSOP; No of Pins: 28; Temperature Range: 0°C to +70°C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7854LAR | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:12-BIT SINGLE CHANNEL PARALLEL ADC I.C. - Bulk |
| AD7854LAR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 100KSPS 12-BIT PARALLEL 28SOIC W - Tape and Reel |
| AD7854LARS | 功能描述:IC ADC 12BIT PARALLEL LP 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7854LARS-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 28-Pin SSOP T/R |
| AD7854LARSZ | 功能描述:IC ADC 12BIT PARALLEL LP 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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