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參數資料
| 型號： | AD7868BQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | LC2MOS Complete, 12-Bit Analog I/O System |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CDIP24 |
| 封裝： | CERDIP-24 |
| 文件頁數： | 10/16頁 |
| 文件大小： | 337K |
| 代理商： | AD7868BQ |
AD7868
–10–
REV. B
AD7868
DAC
LOW-PASS
FILTER
16-BIT
DIGITIZER
MICRO-
CONTROLLER
Figure 11. AD7868 DAC Dynamic Performance Test Circuit
T he digitizer sampling is synchronized with the DAC update
rate to ease FFT calculations. T he digitizer samples the DAC
output after the output has settled to its new value. T herefore, if
the digitizer were to sample the output directly it would effec-
tively be sampling a dc value each time. As a result, the dynamic
performance of the DAC would not be measured correctly. Us-
ing the digitizer directly on the DAC output would give better
results than the actual performance of the DAC. Using a filter
between the DAC and the digitizer means that the digitizer
samples a continuously moving signal and the true dynamic per-
formance of the AD7868 DAC output is measured.
Figure 12 shows a typical 2048 point Fast Fourier T ransform
plot for the AD7868 DAC with an update rate of 83 kHz and an
output frequency of 1 kHz. T he SNR obtained from the graph is
73 dBs.
Figure 12. AD7868 DAC FFT Plot
Some applications will require improved performance versus fre-
quency from the AD7868 DAC. In these applications, a simple
sample-and-hold circuit such as that outlined in Figure 13 will
extend the very good performance of the DAC to 20 kHz. Other
applications will already have an inherent sample-and-hold
function following the AD7868 DAC output. An example of
this type of application is driving a switched-capacitor filter
where the updating of the DAC is synchronized with the
switched-capacitor filter. T his inherent sample-and-hold
function also extends the frequency range performance.
Performance versus Frequency
T he typical performance plots of Figures 14 and 15 show the
AD7868’s DAC performance over a wide range of input fre-
quencies at an update rate of 83 kHz. T he plot of Figure 14 is
without a sample-and-hold on the DAC output while the plot of
Figure 15 is generated with a sample-and-hold on the output.
AD7868*
LDAC
V
OUT
Q
ADG201HS
S1
D1
IN1
AD711
*ADDITIONAL PINS OMITTED FOR CLARITY
R2
2k2
C9
330pF
1μs
ONE
SHOT
DELAY
R1
2k2
LDAC
Figure 13. DAC Sample-and-Hold Circuit
T
A
= +25
°
C
FREQUENCY – kHz
80
70
0
0
5
1
S
2
3
4
40
30
20
10
60
50
Figure 14. DAC Performance vs. Frequency (No Sample-
and-Hold)
T
A
= +25
°
C
FREQUENCY – kHz
80
70
0
0
20
5
S
10
15
40
30
20
10
60
50
Figure 15. DAC Performance vs. Frequency (Sample-and-
Hold)
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PDF描述 |
|---|---|
| AD7868BR | LC2MOS Complete, 12-Bit Analog I/O System |
| AD7869AQ | LC2MOS Complete, 14-Bit Analog I/O System |
| AD7869JN | LC2MOS Complete, 14-Bit Analog I/O System |
| AD7869JR | LC2MOS Complete, 14-Bit Analog I/O System |
| AD7870A | Complete, 12-Bit, 100 kHz , Sampling ADC(完備的,頻率為100kHz,12位A/D轉換器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7868BR | 制造商:Analog Devices 功能描述:Data Acquisition System Single ADC Single DAC 12-Bit 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:ANALOG I/O PORT IC - Bulk |
| AD7868BR-REEL | 功能描述:IC I/O PORT 12BIT ANLG 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| AD7868BRZ | 功能描述:IC I/O PORT 12BIT ANLG 28SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| AD7868BRZ-REEL | 功能描述:IC I/O PORT 12BIT ANLG 28SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| AD7868TQ/883B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CODEC， Single |
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