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參數資料
| 型號： | AD7884BP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 16-Bit, High Speed Sampling ADCs |
| 中文描述： | 2-CH 16-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 13/16頁 |
| 文件大小： | 319K |
| 代理商： | AD7884BP |
AD7884/AD7885
REV. C
–13–
AD7885 to 8088 Interface
T he AD7885, with its byte (8 + 8) data format, is ideal for use
with the 8088 microprocessor. Figure 20 is the interface dia-
gram. Conversion is started by enabling
CSA
. At the end of
conversion, data is read into the processor. T he read instruc-
tions are:
MOV AX , C001
Read 8 MSBs of data
MOV AX , C000
Read 8 LSBs of data
8088
AD7885
ADDRESS
DECODE LOGIC
A15 – A8
AD7 – AD0
MN/MX
+5 V
HBEN
IO/M
ALE
A0
RD
ADDRESS BUS
CONVST
CS
RD
DB7 – DB0
CSA
CSB
DATA BUS
STB
8282
Figure 20. AD7885 to 8088 Interface
AD7884 to ADSP-2101 Interface
Figure 21 shows an intcrface between the AD7884 and the
ADSP-2101. Conversion is initiated using a timer which allows
very accurate control of the sampling instant. T he AD7884
BUSY
line provides an interrupt to the ADSP-2101 when con-
version is completed. T he
RD
pulse width of the processor can
be programmed using the Data Memory Wait State Control
Register. T he result can then be read from the ADC using the
following instruction:
MR0 = DM (ADC)
where MR0 is the ADSP-2101 MR0 register, and
where
ADC is the AD7884 address.
ADDRESS
DECODE LOGIC
ADSP-2101
DMA13 – DMA0
DMD15 – DMD0
IRQn
DMS
RD
EN
TIMER
AD7884
ADDRESS BUS
DATA BUS
CONVST
CS
BUSY
RD
DB15 – DB0
Figure 21. AD7884 to ADSP-2101 Interface
Stand-Alone Operation
If
CS
and
RD
are tied permanently low on the AD7884, then,
when a conversion is completed, output data will be valid on the
rising edge of
BUSY
. T his makes the device very suitable for
stand-alone operation. All that is required to run the device is an
external
CONVST
pulse which can be supplied by a sample
timer. Figure 22 shows the AD7884 set up in this mode with the
BUSY
signal providing the clock for the 74HC574 3-state
latches.
TIMER
AD7884
CONVST
CS
RD
DB15 – DB8
BUSY
HBEN
A0
74HC574
74HC574
CLK
CLK
DB7 – DB0
Figure 22. Stand-Alone Operation
Digital Feedthrough from an Active Bus
It is very important when using the AD7884/AD7885 in a
microprocessor-based system to isolate the ADC data bus from
the active processor bus while a conversion is being executed.
T his will yield the best noise performance from the ADC.
Latches like the 74HC574 can be used to do this. If the device
is connected directly to an active bus then the converter noise
will typically increase by a factor of 30%.
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| AD7884BP-REEL | 制造商:Analog Devices 功能描述:ADC Single 2-Step Flash 166ksps 16-bit Parallel 44-Pin PLCC T/R 制造商:Analog Devices 功能描述:16-BIT PARAL.SAMPL ADC - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:16-BIT PARAL.SAMPL ADC - Tape and Reel |
| AD7884BPZ | 功能描述:IC ADC 16BIT SAMPLING HS 44-PLCC RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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| AD7884BQ | 功能描述:IC ADC 16BIT SAMPLING HS 40-CDIP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率（每秒）:3M 數據接口:- 轉換器數目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:- |
| AD7885AAP | 制造商:Analog Devices 功能描述:16-Bit, High Speed Sampling ADCs |
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