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參數(shù)資料
| 型號： | AD8137YRZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Low Cost, Low Power 12-Bit Differential ADC Driver |
| 中文描述： | OP-AMP, 2600 uV OFFSET-MAX, PDSO8 |
| 封裝： | ROHS COMPLIANT, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 594K |
| 代理商： | AD8137YRZ-REEL7 |
AD8137
THEORY OF OPERATION
The AD8137 is a low power, low cost, fully differential voltage
feedback amplifier that features a rail-to-rail output stage,
common-mode circuitry with an internally derived common-
mode reference voltage, and bias shutdown circuitry. The ampli-
fier uses two feedback loops to separately control differential
and common-mode feedback. The differential gain is set with
external resistors as in a traditional amplifier while the output
common-mode voltage is set by an internal feedback loop,
controlled by an external V
OCM
input. This architecture makes it
easy to arbitrarily set the output common-mode voltage level
without affecting the differential gain of the amplifier.
Rev. A | Page 17 of 24
–OUT
+IN
A
CM
V
OCM
C
C
C
C
CP
+OUT
–IN CN
0
Figure 61. Block Diagram
From Figure 61, the input transconductance stage is an
H-bridge whose output current is mirrored to high impedance
nodes CP and CN. The output section is traditional H-bridge
driven circuitry with common emitter devices driving nodes
+OUT and OUT. The 3 dB point of the amplifier is defined as
C
m
C
g
×
BW
π
=
2
where
g
m
is the transconductance of the input stage and
C
C
is
the total capacitance on node CP/CN (capacitances CP and CN
are well matched). For the AD8137, the input stage g
m
is
~1 mA/V and the capacitance C
C
is 3.5 pF, setting the crossover
frequency of the amplifier at 41 MHz. This frequency generally
establishes an amplifier’s unity gain bandwidth, but with the
AD8137, the closed-loop bandwidth depends upon the
feedback resistor value as well (see Figure 19). The open-loop
gain and phase simulations are shown in Figure 62.
FREQUENCY (MHz)
100
80
60
–60
–80
–40
–20
0
20
40
–120
–140
–100
–200
–180
–160
0.0001
0.01
0.001
0.1
1
10
100
0
OPEN-LOOP GAIN (dB)
PHASE (DEGREES)
Figure 62. Open-Loop Gain and Phase
In Figure 61, the common-mode feedback amplifier A
CM
samples the output common-mode voltage, and by negative
feedback forces the output common-mode voltage to be equal
to the voltage applied to the V
OCM
input. In other words, the
feedback loop servos the output common-mode voltage to the
voltage applied to the V
OCM
input. An internal bias generator
sets the V
OCM
level to approximately midsupply, therefore, the
output common-mode voltage will be set to approximately
midsupply when the V
OCM
input is left floating. The source resis-
tance of the internal bias generator is large and can be overrid-
den easily by an external voltage supplied by a source with a
relatively small output resistance. The V
OCM
input can be driven
to within approximately 1 V of the supply rails while maintain-
ing linear operation in the common-mode feedback loop.
The common-mode feedback loop inside the AD8137 produces
outputs that are highly balanced over a wide frequency range
without the requirement of tightly matched external compo-
nents because it forces the signal component of the output
common-mode voltage to be zeroed. The result is nearly
perfectly balanced differential outputs of identical amplitude
and exactly 180° apart in phase.
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