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| 型號(hào)： | AD8137YRZ-REEL7 |
| 廠(chǎng)商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Low Cost, Low Power 12-Bit Differential ADC Driver |
| 中文描述： | OP-AMP, 2600 uV OFFSET-MAX, PDSO8 |
| 封裝： | ROHS COMPLIANT, MS-012AA, SOIC-8 |
| 文件頁(yè)數(shù)： | 19/24頁(yè) |
| 文件大小： | 594K |
| 代理商： | AD8137YRZ-REEL7 |
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AD8137
The contribution from the input voltage noise spectral density
is computed as
Rev. A | Page 19 of 24
+
=
G
F
n
R
R
v
Vo_n
1
, or equivalently,
v
n
/β
(7)
where
v
n
is defined as the input-referred differential voltage
noise. This equation is the same as that of traditional op amps.
The contribution from the input current noise of each input is
computed as
(
)
F
i
Vo_n
=
2
n
R
(8)
where
i
n
is defined as the input noise current of one input. Each
input needs to be treated separately since the two input currents
are statistically independent processes.
The contribution from each
R
G
is computed as
=
G
F
G
R
R
TR
Vo_n
k
4
3
(9)
This result can be intuitively viewed as the thermal noise of
each
R
G
multiplied by the magnitude of the differential gain.
The contribution from each
R
F
is computed as
F
TR
Vo_n
k
4
4
=
(10)
Voltage Gain
The behavior of the node voltages of the single-ended-to-
differential output topology can be deduced from the signal
definitions and Figure 63. Referring to Figure 63, (C
F
= 0) and
setting
V
IN
= 0 one can write:
F
ON
AP
G
AP
IP
R
V
V
R
V
V
=
(11)
+
=
=
G
F
G
OP
AP
AN
R
R
R
V
V
V
(12)
Solving the above two equations and setting
V
IP
to
V
i
gives the
gain relationship for
V
O, dm
/
V
i
.
i
G
F
dm
O,
ON
OP
V
R
R
V
V
V
=
=
(13)
An inverting configuration with the same gain magnitude can
be implemented by simply applying the input signal to V
IN
and
setting V
IP
= 0. For a balanced differential input, the gain from
V
IN, dm
to
V
O, dm
is also equal to
R
F
/
R
G
, where V
IN, dm
=
V
IP
V
IN
.
Feedback Factor Notation
When working with differential drivers, it is convenient to in-
troduce the feedback factor β, which is defined as
G
F
G
R
R
R
+
≡
β
(14)
This notation is consistent with conventional feedback analysis
and is very useful, particularly when the two feedback loops are
not matched.
Input Common-Mode Voltage
The linear range of the V
AN
and V
AP
terminals extends to within
approximately 1 V of either supply rail. Since V
AN
and V
AP
are
essentially equal to each other, they are both equal to the ampli-
fier’s input common-mode voltage. Their range is indicated in
the specifications tables as input common-mode range. The
voltage at V
AN
and V
AP
for the connection diagram in Figure 63
can be expressed as
=
=
=
ACM
AP
AN
V
V
(
V
V
×
+
+
+
2
×
+
OCM
V
G
F
G
IN
IP
G
F
F
R
R
R
V
R
R
R
)
(15)
where
V
ACM
is the common-mode voltage present at the ampli-
fier input terminals.
Using the β notation, Equation (15) can be written as
(
OCM
ACM
V
V
β
+
β
=
1
)
ICM
V
(16)
or equivalently,
(
)
ICM
OCM
V
ICM
ACM
V
V
V
β
+
=
(17)
where
V
ICM
is the common-mode voltage of the input signal, i.e.,
V
V
V
≡
.
2
IN
IP
ICM
+
For proper operation, the voltages at
V
AN
and
V
AP
must stay
within their respective linear ranges.
Calculating Input Impedance
The input impedance of the circuit in Figure 63 will depend on
whether the amplifier is being driven by a single-ended or a
differential signal source. For balanced differential input signals,
the differential input impedance (
R
IN, dm
) is simply
G
dm
IN,
R
R
2
=
(18)
For a single-ended signal (for example, when V
IN
is grounded,
and the input signal drives V
IP
), the input impedance becomes
)
(
1
F
G
F
+
G
R
IN
R
R
R
R
=
(19)
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