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參數資料
| 型號： | AD8176ABPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 475 MHz, Triple 16 】 9 Video Crosspoint Switch |
| 中文描述： | 16-CHANNEL, CROSS POINT SWITCH, PBGA676 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, ROHS COMPLIANT, PLASTIC, MS-034AAL-1, BGA-676 |
| 文件頁數： | 22/32頁 |
| 文件大小： | 489K |
| 代理商： | AD8176ABPZ |
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AD8176
Preliminary Technical Data
APPLICATIONS
OPERATING MODES
Depending on the state of the CMENC logic input, the AD8176
can be set in either of two differential-in, differential-out operat-
ing modes. Also, monitors can be driven directly by tapping the
outputs single-ended and making use of the decoded H and V
sync outputs.
Middle-of-CAT5-Run Application,
CM Encoding Turned Off
In this application, the AD8176 is placed somewhere in the
middle of a CAT5 run. By tying CMENC low, the CM of each
RGB differential pair is removed through the device (or turned
off), while the overall CM at the output is defined by the reference
value VOCM_CMENCOFF. In this mode of operation CM
noise is removed, while the intended differential RGB signals
are buffered and passed to the outputs. The AD8176 is placed in
this operation mode when used in a sync-on color scheme.
Figure 21 shows the voltage levels and CM handling for a single
input channel connected to a single output channel in a middle-
of-CAT5-run application with CM encoding turned off.
Rev. PrA | Page 22 of 32
CM
R
CM
B
DIFF. R
DIFF. B
INPUT
CM
G
DIFF. G
CMENC
AD8176
CM
R
CM
B
DIFF. R
DIFF. B
OUTPUT
CM
CM
G
DIFF. G
VOCM_CMENCOFF
0
Figure 21. AD8176 in a Middle-of-CAT5-Run Application, CM Encoding Off
(Note that in this application, the H and V outputs,
though asserted, are not used)
Inputs VBLK and VOCM_CMENCOFF allow the user
complete flexibility in defining the output CM level and the
amount of overlap between the positive and negative phases,
thus maximizing output headroom usage. Whenever VBLK
differs from VOCM_CMENCOFF by more than ±100 mV, a
differential voltage Δ
diff
is added at the outputs according to the
expression Δ
diff
= 2
×
(VBLK VOCM_CMENCOFF.)
Conversely, whenever the difference between VBLK and
VOCM_CMENCOFF is less than ±100 mV, no differential
voltage is added at the outputs.
Middle-of-CAT5-Run Application,
CM Encoding Turned On
In this application, the AD8176 is also placed somewhere in the
middle of a CAT5 run, although the common-mode handling is
different. By tying CMENC high, the CM of each RGB input is
passed through the part with a gain of +1, while at the same
time, the overall output CM is stripped and set equal to the
voltage applied at the VOCM_CMENCON pin. The AD8176 is
placed in this operation mode when used with a sync-on CM
scheme. Although asserted, the H and V outputs are not used in
this application. Figure 22 shows the voltage levels and CM
handling for a single input channel connected to a single output
channel in a middle-of-CAT5-run application with CM
encoding turned on.
CM
R
CM
B
DIFF. R
DIFF. B
INPUT
CM
G
DIFF. G
CMENC
AD8176
CM
R
CM
B
DIFF. R
DIFF. B
OUTPUT
CM
G
DIFF. G
VOCM_CMENCON
0
Figure 22. AD8176 in Middle-of-CAT5-Run Application, CM Encoding On
(Note that in this application, the H and V outputs,
though asserted, are not used)
In this operation mode, the difference Δ
diff
= 2
×
(VBLK
VOCM_CMENCOFF) still adds an output differential voltage,
as described in the previous section.
End-of-CAT5-Run, CM Encoding Turned Off—
Driving a Monitor Directly
In this application, the AD8176 is placed at the end of a CAT-5
run to drive a monitor directly
—
the differential outputs are
tapped single-ended to drive the monitor’s inputs, CMENC is
tied to logic low to remove sync-on-CM information at the
output of the part, and the decoded H and V sync outputs are
tied to the monitor’s sync inputs.
The differential-in, differential-out gain of +4 provides a
differential-in, single-ended out gain of +2 at the output pins of
the AD8176. This yields the correct differential-in, single-ended
out gain of +1 at the input of the monitor.
The relationship between the incoming sync-on CM signaling
and the H and V syncs is defined according to Table 16.
Table 16. H and V Sync Truth Table (V
POS
/V
NEG
= ±2.5 V)
CM
R
CM
G
CM
B
0.5
0
0
0
0.5
0.5
0.5
0.5
0
0
0.5
0.5
H
Low
Low
High
High
V
High
Low
Low
High
The following two statements are equivalent to the truth table
(Table 16) in producing H and V for all allowable CM inputs:
1.
H sync is high when the CM of Blue is larger than the CM
of Red
2.
V sync is high when the combined CM of Red and Blue is
larger then the CM of Green.
Hysteresis is built in, so that H and V syncs are not asserted
until the CM differences between Red, Green, and Blue differ by
more than TBD mV from each other.
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相關代理商/技術參數 |
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| AD8176-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:475 MHz, Triple 16 】 9 Video Crosspoint Switch |
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