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參數資料
| 型號： | AD830 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | High Speed, Video Difference Amplifier(高速,視頻差分運放) |
| 中文描述： | 高速，視頻差分放大器（高速，視頻差分運放） |
| 文件頁數： | 8/16頁 |
| 文件大?。?/td> | 244K |
| 代理商： | AD830 |
AD830
REV. A
–8–
T RADIT IONAL DIFFE RE NT IAL AMPLIFICAT ION
In the past, when differential amplification was needed to reject
common-mode signals superimposed with a desired signal; most
often the solution used was the classic op amp based difference
amplifier shown in Figure 19. T he basic function V
O
= V
1
–V
2
is
simply achieved, but the overall performance is poor and the cir-
cuit possesses many serious problems that make it difficult to re-
alize a robust design with moderate to high levels of
performance.
R
1
R
2
R
3
R
4
V
OUT
V
2
V
1
ONLY IF R
1
= R
2
= R
3
= R
4
DOES
V
OUT
= V
1
– V
2
Figure 19. Op Amp Based Difference Amplifier
PROBLE MS WIT H T HE OP AMP BASE D APPROACH
Low Common-Mode Rejection Ratio (CMRR)
Low Impedance Inputs
CMRR Highly Sensitive to the Value of Source R
Different Input Impedance for the + and – Input
Poor High Frequency CMRR
Requires Very Highly Matched Resistors R
1
–R
4
to Achieve
High CMRR
Halves the Bandwidth of the Op Amp
High Power Dissipation in the Resistors for Large Common-
Mode Voltage
AD830 FOR DIFFE RE NT IAL AMPLIFICAT ION
T he AD830 amplifier was specifically developed to solve the
listed problems with the discrete difference amplifier approach.
Its topology, discussed in detail in a later section, by design acts
as a difference amplifier. T he circuit of Figure 20 shows how
simply the AD830 is configured to produce the difference of two
signals V
1
and V
2
, in which the applied differential signal is
exactly reproduced at the output relative to a separate output
common. Any common-mode voltage present at the input is
removed by the AD830.
A=1
V
→
I
V
→
I
V
OUT
V
2
V
1
V
OUT
= V
1
– V
2
I
Y
I
X
Figure 20. AD830 as a Difference Amplifier
ADVANT AGE OUS PROPE RT IE S OF T HE AD830
High Common-Mode Rejection Ratio (CMRR)
High Impedance Inputs
Symmetrical Dynamic Response for +1 and –1 Gain
Low Sensitivity to the Value of Source R
Equal Input Impedance for the + and – Input
Excellent High Frequency CMRR
No Halving of the Bandwidth
Constant Power Distortion vs. Common-Mode Voltage
Highly Matched Resistors Not Needed
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