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參數資料
| 型號： | AD8343-EVAL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | DC-to-2.5 GHz High IP3 Active Mixer |
| 中文描述： | DC至2.5GHz的高IP3有源混頻器 |
| 文件頁數： | 18/27頁 |
| 文件大小： | 394K |
| 代理商： | AD8343-EVAL |
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REV. 0
AD8343
–18–
FREQUENCY (50MHz
–
2500MHz)
0
–
30
0
500
R
–
1000
1500
2000
2500
–
25
–
20
–
15
–
10
–
5
Figure 16. LO Input Differential Return Loss
At low LO frequencies, it is reasonable to drive the AD8343
with a single-ended LO, connecting the undriven terminal to
GND through a dc block. This will result in an input impedance
closer to 25
at low frequencies, which should be factored
into the design. At higher LO frequencies, differential drive
is recommended.
The suggested minimum LO power level is about
–
12 dBm. This
can be seen in Figure 17.
LO POWER
–
dBm
0
–
40
C
–
4
3
2
1
–
20
–
10
–
30
25
20
15
10
5
NOISE FIGURE
0
N
–
5
CONVERSION GAIN
INPUT RF = 900MHz
OUTPUT IF = 170MHz
LO LOW SIDE INJECTION
Figure 17. Gain and Noise Figure vs. LO Input Power
DC Coupling the LO
The AD8343
’
s LO limiting amplifier chain is internally dc-
coupled. In some applications or experimental situations it is
useful to exploit this property. This section addresses some ways
in which to do it.
The LO pins are internally biased at about 360 mV with respect
to COMM. Driving the LO to either extreme requires injecting
several hundred microamps into one LO pin and extracting
about the same amount of current from the other. The incre-
mental impedance at each pin is about 25
, so the voltage level
on each pin is disturbed very little by the application of external
currents in that range.
Figure 18 illustrates how to drive the LO port with continuous
dc and also from standard ECL powered by
–
5.2 V.
ECL
BIAS
AD8343
VPOS
DCPL
PWDN
LOIP
LOIM
INPP
INPM
OUTM
OUTP
COMM
LO
DRIVER
–
5.2V
–
5.2V
390
1.2k
1.2k
390
3.6k
3.6k
+5V
–
5.2V
ECL
13k
CONTINUOUS
DC
1k
BIAS
AD8343
VPOS
DCPL
PWDN
LOIP
LOIM
INPP
INPM
OUTM
OUTP
COMM
LO
DRIVER
Figure 18. DC Interface to LO Port
A Step-by-Step Approach to Impedance Matching
The following discussion addresses, in detail, the matter of
establishing a differential impedance match to the AD8343.
This section will specifically deal with the input match, and
using side
“
A
”
of the evaluation board (Figure 23). An analo-
gous procedure would be used to establish a match to the
output if desired.
Step 1: Circuit Setup
In order to do this work the AD8343 must be powered up, driven
with LO; its outputs should be terminated in a manner that
avoids the common-mode stability problem as discussed in
the Input and Output Stability section. A convenient way to
deal with the output termination is to place ferrite chokes at
L3A and L4A and omit the output matching components
altogether.
It is also important to establish the means of providing bias
currents to the input pins because this network may have
unexpected loading effects and inhibit matching progress.
Step 2: Establish Target Impedance
This step is necessary when the single-ended-to-differential
network (input balun) does not produce a 50
output imped-
ance. In order to provide for maximum power transfer, the input
impedance of the matching network, loaded with the AD8343
input impedance (including ballast resistors), should be the conju-
gate of the output impedance of the single-ended-to-differential
network. This step is of particular importance when utilizing
transmission line baluns because the differential output imped-
ance of the input balun may differ significantly from what is
expected. Therefore, it is a good idea to make a separate mea-
surement of this impedance at the desired operating frequency
before proceeding with the matching of the AD8343.
相關PDF資料 |
PDF描述 |
|---|---|
| AD8343ARU | DC-to-2.5 GHz High IP3 Active Mixer |
| AD8343ARU-REEL7 | DC-to-2.5 GHz High IP3 Active Mixer |
| AD8344 | Active Receive Mixer 400 MHz to 1.2 GHz |
| AD8344-EVAL | Active Receive Mixer 400 MHz to 1.2 GHz |
| AD8344ACPZ-REEL7 | Active Receive Mixer 400 MHz to 1.2 GHz |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8343-EVALZ | 制造商:Analog Devices 功能描述:AD8343 EVALUATION BOARD - Bulk |
| AD8344 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Active Receive Mixer 400 MHz to 1.2 GHz |
| AD8344ACPZ | 制造商:Analog Devices 功能描述:UP/DOWN CONV MIXER 5V 1.2GHZ 16LFCSP EP - Tape and Reel 制造商:Analog Devices 功能描述:IC SM RF MIXER 800MHZ |
| AD8344ACPZ | 制造商:Analog Devices 功能描述:IC RF MIXER 800MHZ SMD LFCSP-16 |
| AD8344ACPZ-REEL7 | 功能描述:IC MIXER 400MHZ-1.2GHZ 16-LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD8344 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數目:1 增益:17dB 噪音數據:2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應商設備封裝:12-QFN-EP（3x3） |
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