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參數(shù)資料
| 型號： | AD8362ARUZ-REEL71 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector |
| 中文描述： | 50赫茲到2.7 GHz 60分貝TruPwr⑩探測器 |
| 文件頁數(shù)： | 26/36頁 |
| 文件大?。?/td> | 700K |
| 代理商： | AD8362ARUZ-REEL71 |
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AD8362
Operation at high slopes is useful when a particular subrange of
the input is measured in greater detail. However, a measurement
range of 60 dB would correspond to a 6 V change in VOUT at
this slope, exceeding the capacity of the AD8362’s output stage
when operating on a 5 V supply. This requires that the intercept
is repositioned to place the desired subrange within a window
corresponding to an output range of 0.2 V ≤ VOUT ≤ 4.8 V,
a 46 dB range.
Rev. B | Page 26 of 36
Using the arrangement shown in Figure 57, an output of 0.5 V
corresponds to the lower end of the desired subrange, and 4.5 V
corresponds to the upper limit with 3 dB of margin at each end
of the range, which is nominally 3 mV rms to 300 mV rms, with
the intercept at 1.9 mV rms. Note that R2 is connected to VREF
rather than ground. R3 is needed to ensure that the AD8362’s
reference buffer, which can sink only a small current, is
correctly loaded.
It is apparent that a variable attenuation factor based on this
scheme could provide a manual adjustment of the slope, but
there are few situations in which this is of value. When the slope
is raised by some factor, the loop capacitor, CLPF, should be
raised by the same factor to ensure stability and to preserve a
chosen averaging time. The slope can be lowered by placing a
two-resistor attenuator after the output pin, following standard
practice.
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COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
ACOM
VREF
VTGT
VPOS
VOUT
VSET
ACOM
CLPF
AD8362
V
OUT
R1
4.02k
R2
4.32k
R3
2k
0
Figure 57. Scheme Providing 100 mV/dB Slope for Operation
over a 3 mV to 300 mV Input Range
ENVELOPE ELIMINATION MODE
The VTGT input can be used to track the AM modulation
envelope on an RF signal to affect a form of envelope
elimination. The modulation waveform must be known and a
sample must be available as a baseband voltage. Using this
voltage as VTGT, the AD8362 tracks this envelope when
demodulation is realized by the squaring cell. So if the envelope
output of the main amplifier should, for example, double over
some interval while the target voltage that satisfies the AGC
loop criterion also doubles, the net effect is that the gain of the
amplifier does not need to change to keep the loop balanced.
That being the case, the gain-control voltage, VSET, likewise
does not need to change. It follows that the output is free of
fluctuations. In measurement mode, that voltage is also the
output, so it also remains at a constant value as the modulation
varies the input magnitude. The bandwidth of the dc-coupled
amplifier in the AD8362 that buffers VTGT has been kept high
(~300 MHz) so that even fast AM modulation envelopes can be
accurately tracked.
Figure 58 shows an example. As depicted in the top panel of
Figure 59, the input to the AD8362 is a pure, ideal, sinusoidal
100 MHz carrier that is amplitude modulated at 100 kHz by
another pure sine wave. A suitably scaled sample of the
modulation voltage is also applied to the VTGT pin. In this
example, its average value is 1.25 V (the normal bias level for
VTGT), and the amplitude is 0.75 V. Therefore VTGT ranges
from 0.5 V to 2 V, corresponding to a factor of 4 change (16 dB)
in the target voltage over each cycle of the modulation. The
resulting VOUT waveform is of essentially constant value at
about 2.5 V, as shown in Figure 59; this is compared with the
deeply fluctuating output for a fixed VTGT of 1.25 V.
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COMM
CHPF
DECL
INHI
INLO
DECL
PWDN
COMM
ACOM
VREF
VTGT
VPOS
VOUT
VSET
ACOM
CLPF
1nF
V
OUT
AD8362
AMPLITUDE
MODULATED
SIGNAL INPUT
1nF
C
LPF
V
S
+5V nom,
@ 24mA
0.1
μ
F
3.3
1nF
NC
BASEBAND REPLICA
OF MODULATED INPUT
SIGNAL ENVELOPE
NC
0
Figure 58. Envelope Elimination Using the VTGT Interface
TIME (
μ
s)
R
0.2
–0.2
1
0
2
3
0
2
1
0
V
V
FIXED TARGET VOLTAGE (1.25V)
WITH FIXED TARGET
VOLTAGE
WITH VARYING TARGET VOLTAGE
VARYING TARGET VOLTAGE
10
20
30
40
0
Figure 59. Waveforms for Envelope Elimination Scheme
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8362-EVAL | 制造商:Analog Devices 功能描述:RF DETECTOR, 50 HZ TO 2.7GHZ 60 DB TRUPWR DETECTOR - Bulk |
| AD8362-EVALZ | 功能描述:BOARD EVAL FOR AD8362 RoHS:是 類別:RF/IF 和 RFID >> RF 評估和開發(fā)套件，板 系列:TruePower™ 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
| AD8363 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 Hz to 6 GHz, 50 dB TruPwr? Detector |
| AD8363_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 Hz to 6 GHz, 50 dB TruPwr? Detector |
| AD8363ACPZ-R2 | 制造商:Analog Devices 功能描述:TRUE RMS PWR DETECTOR 24LFCSP EP - Tape and Reel |
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