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參數資料
型號: AD9228
廠商: Analog Devices, Inc.
英文描述: Quad, 12-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述: 四,12位,六十五分之四十○MSPS的串行LVDS 1.8弗吉尼亞州/ D轉換器
文件頁數: 31/52頁
文件大小: 1659K
代理商: AD9228
AD9228
MEMORY MAP
READING THE MEMORY MAP TABLE
Each row in the memory map table has eight address locations.
The memory map is roughly divided into three sections: chip
configuration register map (Address 0x00 to Address 0x02), device
index and transfer register map (Address 0x05 and Address 0xFF),
and program register map (Address 0x08 to Address 0x25).
Rev. 0 | Page 31 of 52
The left-hand column of the memory map indicates the register
address number in hexadecimal. The default value of this address is
shown in hexadecimal in the right-hand column. The Bit 7 (MSB)
column is the start of the default hexadecimal value given. For
example, Hexadecimal Address 0x09, Clock, has a hexadecimal
default value of 0x01. This means Bit 7 = 0, Bit 6 = 0, Bit 5 = 0,
Bit 4 = 0, Bit 3 = 0, Bit 2 = 0, Bit 1 = 0, and Bit 0 = 1, or 0000 0001
in binary. This setting is the default for the duty cycle stabilizer in
the on condition. By writing a 0 to Bit 6 at this address, the duty
cycle stabilizer turns off. For more information on this and other
functions, consult the user manual
Interfacing to High Speed
ADCs via SPI
.
RESERVED LOCATIONS
Undefined memory locations should not be written to except
when writing the default values suggested in this data sheet.
Addresses that have values marked as 0 should be considered
reserved and have a 0 written into their registers during power-up.
DEFAULT VALUES
Coming out of reset, critical registers are preloaded with default
values. These values are indicated in Table 15, where an X refers
to an undefined feature.
LOGIC LEVELS
An explanation of various registers follows: “Bit is set” is
synonymous with “bit is set to Logic 1” or “writing Logic 1 for
the bit.” Similarly, “clear a bit” is synonymous with “bit is set to
Logic 0” or “writing Logic 0 for the bit.”
相關PDF資料
PDF描述
AD9228-65EB Quad, 12-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9229BCP-50 Quad 12-Bit, 50/65 MSPS Serial LVDS 3V A/D Converter
AD9229BCP-65 Quad 12-Bit, 50/65 MSPS Serial LVDS 3V A/D Converter
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AD9235 12-Bit, 20/40/65 MSPS 3 V A/D Converter
相關代理商/技術參數
參數描述
AD9228_07 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, 12-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9228-65EB 制造商:Analog Devices 功能描述:
AD9228-65EB1 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed ADC USB FIFO Evaluation Kit
AD9228-65EBZ 功能描述:BOARD EVAL FOR AD9228 RoHS:是 類別:編程器,開發系統 >> 評估板 - 模數轉換器 (ADC) 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數量:1 位數:12 采樣率(每秒):94.4k 數據接口:USB 輸入范圍:±VREF/2 在以下條件下的電源(標準):- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板,軟件
AD9228ABCPZ-40 功能描述:IC ADC 12BIT SPI/SRL 40M 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率(每秒):20M 數據接口:并聯 轉換器數目:2 功率耗散(最大):155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP(7x7) 包裝:Digi-Reel® 輸入數目和類型:4 個單端,單極;2 個差分,單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
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