- 您現在的位置：買賣IC網 > PDF目錄373962 > AD9248BCPZ-40 (ANALOG DEVICES INC) 14-Bit, 20/40/65 MSPS Dual A/ D Converter PDF資料下載
參數資料
| 型號： | AD9248BCPZ-40 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| 中文描述： | DUAL 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC64 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-220-VMMD, LFCSP-64 |
| 文件頁數： | 16/23頁 |
| 文件大小： | 419K |
| 代理商： | AD9248BCPZ-40 |
AD9248
Preliminary Technical Data
input; therefore, the precise values are dependant on the
application. In IF under sampling applications, any shunt
capacitors should be removed. In combination with the driving
source impedance, they would limit the input bandwidth. For
best dynamic performance, the source impedances driving
VIN+ and VIN- should be matched such that common-mode
settling errors are symmetrical. These errors will be reduced by
the common-mode rejection of the ADC.
Rev. PrE | Page 16 of 23
Figure xx.
Switched Capacitor Input
An internal differential reference buffer creates positive and
negative reference voltages, REFT and REFB, respectively, that
define the span of the ADC core. The output common-mode of
the reference buffer is set to midsupply, and the REFT and
REFB voltages and span are defined as follows:
(
REF
V
AVDD
2
1
REFT
+
=
(
REF
V
AVDD
2
1
REFB
+
=
(
2
REFB
REFT
2
Span
×
=
×
=
)
)
)
REF
V
It can be seen from the equations above that the REFT and
REFB voltages are symmetrical about the mid-supply voltage
and, by definition, the input span is twice the value of the V
REF
voltage.
The internal voltage reference can be pin-strapped to fixed
values of 0.5 V or 1.0 V, or adjusted within the same range as
discussed in the Internal Reference Connection section.
Maximum SNR performance will be achieved with the
AD9248 set to the largest input span of
2 V
. The relative SNR degradation will be 3 dB when
changing from 2 V
P-P
mode to 1 V
P-P
mode.
The SHA may be driven from a source that keeps the signal
peaks within the allowable range for the selected reference
voltage. The minimum and maximum common-mode input
levels are defined as follows:
2
V
(
VCM
REF
MIN
=
)
2
V
AVDD
VCM
REF
MAX
+
=
The minimum common-mode input level allows the AD9248 to
accommodate ground-referenced inputs. Although optimum
performance is achieved with a differential input, a single-
ended source may be driven into VIN+ or VIN- . In this
configuration, one input will accept the signal, while the
opposite input should be set to midscale by connecting it to an
appropriate reference. For example, a 2 V
signal may be
applied to VIN+ while a 1 V reference is applied to VIN- . The
AD9248 will then accept an input signal varying between 2 V
and 0 V. In the single-ended configuration, distortion
performance may degrade significantly as compared to the
differential case. However, the effect will be less noticeable at
lower input frequencies and in the lower speed grade models
(AD9248-40 and AD9248-20).
Differential Input Configurations
As previously detailed, optimum performance will be achieved
while driving the AD9248 in a differential input configuration.
For base band applications, the AD8138 differential driver
provides excellent performance and a flexible interface to the
ADC. The output common-mode voltage of the AD8138 is
easily set to AVDD/2, and the driver can be configured in a
Sallen-Key filter topology to provide band limiting of the input
signal.
At input frequencies in the second Nyquist zone and above, the
performance of most amplifiers will not be adequate to achieve
the true performance of the AD9248. This is especially true in
IF under sampling applications where frequencies in the 70
MHz to 200 MHz range are being sampled. For these
applications, differential transformer coupling is the
recommended input configuration, as shown in Figure .
Figure xx.
Differential Transformer Coupling
The signal characteristics must be considered when selecting a
transformer. Most RF transformers will saturate at frequencies
below a few MHz, and excessive signal power can also cause
core saturation, which leads to distortion.
Single-Ended Input Configuration
A single-ended input may provide adequate performance in
cost-sensitive applications. In this configuration, there will be a
AD9248
相關PDF資料 |
PDF描述 |
|---|---|
| AD9248BCPZ-65 | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248BCPZRL7-20 | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248BCPZRL7-40 | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248BCPZRL7-65 | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248BST-20 | 14-Bit, 20/40/65 MSPS Dual A/ D Converter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9248BCPZ-65 | 功能描述:IC ADC 14BIT DUAL 65MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD9248BCPZRL-20 | 功能描述:IC ADC 14BIT DUAL 20MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| AD9248BCPZRL-40 | 功能描述:IC ADC 14BIT DUAL 40MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| AD9248BCPZRL-65 | 功能描述:IC ADC 14BIT DUAL 65MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| AD9248BCPZRL7-20 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter |
發布緊急采購，3分鐘左右您將得到回復。