欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: AD9821
廠商: Analog Devices, Inc.
英文描述: Complete 12-Bit 40 MSPS Imaging Signal Processor
中文描述: 完整的12位40 MSPS的影像信號處理器
文件頁數: 11/16頁
文件大小: 277K
代理商: AD9821
REV. 0
AD9821
–11–
CIRCUIT DESCRIPTION AND OPERATION
The AD9821 signal processing chain is shown in Figure 10.
Each processing step is essential in achieving a high quality
image from the raw imager pixel data.
Differential Input SHA
The differential input SHA circuit is designed to accommodate
a variety of different image sensor output voltages. The timing
shown in Figure 8 illustrates how the DATACLK signal is used to
sample both the VIN+ and VIN– signals simultaneously. The
imager signal is sampled on the rising edges of DATACLK.
Placement of this clock signal is critical in achieving the best
performance from the imager. An internal DATACLK delay (t
ID
)
of 3 ns is caused by internal propagation delays.
The differential input can be used in a variety of single-ended
and differential configurations, as shown in Table VI. The
allowable voltage range for both VIN+ or VIN– is from 0 V
to 1.8 V. Signal levels outside this range will result in severely
degraded performance. Regardless of the input configuration,
the voltage sampled by the SHA is always equal to VIN+ minus
VIN–. VIN+ must always be equal to or greater than VIN– or
0dB TO 36dB
BYP1
VIN+
DIGITAL
FILTERING
CLPOB
OPTICAL BLACK
CLAMP
DOUT
12-BIT
ADC
VGA
8-BIT
DAC
CLAMP LEVEL
REGISTER
8
VGA GAIN
REGISTER
10
SHA
INTERNAL
VREF
12
REFT
REFB
1.0V
2.0V
DATACLK
VIN–
0.45V
INTERNAL
BIAS
PBLK
0.1 F
1.0 F
1.0 F
Figure 10. Internal Block Diagram
negative clipping will occur. A small amount of offset between
the VIN+ and VIN– signals is allowable and can be corrected by
the Optical Black Clamp, up to
±
30 mV.
Note that the VIN+ and VIN– inputs do not contain any dc
restoration or bias circuitry. Therefore, dc-coupling is recom-
mended when driving the AD9821 analog inputs. If ac-coupling is
used, external biasing circuitry must be provided for the VIN+
and VIN– inputs to keep them in the acceptable common-mode
voltage range of 0 V to 1.8 V.
Table VI. Example Input Voltage Configurations
VIN+ Range (V) VIN– Range (V) SHA Output Range (V)
Black White
Black
White
Black
White
0
0.5
1.0
0.5
1.0
1.0
1.5
1.5
1.0
1.0
0
0.5
1.0
0.5
1.0
0
0.5
0.5
0
0
0
0
0
0
0
1.0
1.0
1.0
1.0
1.0
相關PDF資料
PDF描述
AD9821KST Complete 12-Bit 40 MSPS Imaging Signal Processor
AD9822 Complete 14-Bit CCD/CIS Signal Processor
AD9822JR Complete 14-Bit CCD/CIS Signal Processor
AD9822JRS Complete 14-Bit CCD/CIS Signal Processor
AD9823 Correlated Double Sampler (CDS)
相關代理商/技術參數
參數描述
AD9821KST 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:12 BIT 40 MSPS IMAGING SIGNAL PROCESSOR - Bulk
AD9821KSTRL 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:12 BIT 40 MSPS IMAGING SIGNAL PROCESSOR - Tape and Reel
AD9821KSTZ 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP
AD9821KSTZRL 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP T/R
AD9821KSTZRL7 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:- Bulk
主站蜘蛛池模板: 大洼县| 台北县| 康定县| 昂仁县| 吉安市| 遵义县| 巴塘县| 峨眉山市| 荥阳市| 崇左市| 抚松县| 遵义县| 大安市| 河间市| 苗栗县| 河北省| 天祝| 南平市| 巩留县| 三门峡市| 修文县| 桑日县| 保德县| 卢湾区| 平阳县| 明溪县| 孝昌县| 淄博市| 榆树市| 朝阳县| 岚皋县| 乃东县| 扶沟县| 崇明县| 甘谷县| 五指山市| 稷山县| 郁南县| 涿鹿县| 安仁县| 琼中|