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參數資料
| 型號： | AD9848KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processors with Integrated Timing Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數： | 12/36頁 |
| 文件大?。?/td> | 347K |
| 代理商： | AD9848KST |
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REV. 0
AD9848/AD9849
–12–
SERIAL INTERFACE TIMING
SDATA
A0
A1
A2
A4
A5
A6
A7
D0
D1
D2
D3
D4
D5
XX
XX
SCK
SL
A3
NOTES
1. SDATA BITS ARE LATCHED ON SCK RISING EDGES.
2. 14 SCK EDGES ARE NEEDED TO WRITE ADDRESS AND DATA BITS.
3. FOR 16-BIT SYSTEMS, TWO EXTRA DUMMY BITS MAY BE WRITTEN. DUMMY BITS ARE IGNORED.
4. NEW DATA IS UPDATED AT EITHER THE SL RISING EDGE, OR AT THE HD FALLING EDGE AFTER THE NEXT VD FALLING EDGE.
5. VD/HD UPDATE POSITION MAY BE DELAYED TO ANY HD FALLING EDGE IN THE FIELD USING THE UPDATE REGISTER.
VD
HD
SL UPDATED
VD/HD UPDATED
t
DS
t
DH
t
LS
t
LH
Figure 3a. Serial Write Operation
SDATA
A0
A1
A2
A4
A5
A6
A7
D0
D1
D2
D3
D4
D5
SCK
SL
A3
NOTES
1. MULTIPLE SEQUENTIAL REGISTERS MAY BE LOADED CONTINUOUSLY.
2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 6-BIT DATA WORDS.
3. THE ADDRESS WILL AUTOMATICALLY INCREMENT WITH EACH 6-BIT DATA WORD (ALL 6 BITS MUST BE WRITTEN).
4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.
5. NEW DATA IS UPDATED AT EITHER THE SL RISING EDGE, OR AT THE HD FALLING EDGE AFTER THE NEXT VD FALLING EDGE.
D0
D1
D2
D3
D4
D5
D0
...
...
...
DATA FOR STARTING
REGISTER ADDRESS
DATA FOR NEXT
REGISTER ADDRESS
D2
D1
Figure 3b. Continuous Serial Write Operation
COMPLETE REGISTER LISTING
Table I
Register
Description
Register
Description
oprmode
ctlmode
preventpdate
readback
vdhdpol
fieldval
hblkretime
tgcore_rstb
h12pol
h1posloc
h1negloc
AFE Operation Modes
AFE Control Modes
Prevents Loading of VD-Updated Registers
Enables Serial Register Readback Mode
VD/HD Active Polarity
Internal Field Pulse Value
Retimes the H1 hblk to Internal Clock
Reset Bar Signal for Internal TG Core
H1/H2 Polarity Control
H1 Positive Edge Location
H1 Negative Edge Location
h1drv
h2drv
h3drv
h4drv
rgpol
rgposloc
rgnegloc
rgdrv
shpposloc
shdposloc
H1 Drive Current
H2 Drive Current
H3 Drive Current
H4 Drive Current
RG Polarity
RG Positive Edge Location
RG Negative Edge Location
RG Drive Current
SHP Sample Location
SHD Sample Location
Notes on Register Listing:
1. All addresses and default values are expressed in Hexadecimal.
2. All registers are VD/HD updated as shown in Figure 3, except for the above-listed registers that are SL updated.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9848KSTRL | 制造商:Analog Devices 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MSPS 3V AFE & T - Tape and Reel |
| AD9849 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CCD Signal Processors with Integrated Timing Driver |
| AD9849AKST | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Trays 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel |
| AD9849AKSTRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V/3.3V/5V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 30 MSPS SIGNAL PROCESSOR - Tape and Reel |
| AD9849AKSTZ | 功能描述:IC CCD SIGNAL PROC 12BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
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