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參數(shù)資料
型號(hào): AD9849
廠商: Analog Devices, Inc.
英文描述: CCD Signal Processors with Integrated Timing Driver
中文描述: CCD信號(hào)處理器集成時(shí)序驅(qū)動(dòng)
文件頁數(shù): 5/36頁
文件大小: 347K
代理商: AD9849
REV. 0
–5–
AD9848/AD9849
AD9849–ANALOG SPECIFICATIONS
(T
MIN
to T
MAX
, AVDD = DVDD = 3.0 V,
f
CLI
= 30 MHz, unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
Notes
CDS
Gain
Allowable CCD Reset Transient
1
Max Input Range Before Saturation
1
Max CCD Black Pixel Amplitude
1
0
500
dB
mV
V p-p
mV
See Input Waveform in Note 1
1.0
150
PIXEL GAIN AMPLIFIER (
PxGA
)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Min Gain (32)
Med Gain (0)
Max Gain (31)
1.0
1.6
V p-p
V p-p
Steps
64
Guaranteed
–2
4
10
dB
dB
dB
Medium Gain (4 dB) Is Default Setting
VARIABLE GAIN AMPLIFIER (VGA)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Low Gain (91)
Max Gain (1023)
1.6
2.0
V p-p
V p-p
Steps
1024
Guaranteed
2
36
dB
dB
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Min Clamp Level (0)
Max Clamp Level (255)
256
Steps
Measured at ADC Output
0
255
LSB
LSB
A/D CONVERTER
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Full-Scale Input Voltage
12
Bits
LSB
±
0.5
Guaranteed
2.0
±
1.0
V
VOLTAGE REFERENCE
Reference Top Voltage (VRT)
Reference Bottom Voltage (VRB)
2.0
1.0
V
V
SYSTEM PERFORMANCE
Gain Accuracy
Specifications Include Entire Signal Chain
Gain Includes 4 dB Default
PxGA
Gain
Low Gain (91)
Max Gain (1023)
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
5
38
6
39.5
0.2
0.6
40
7
41
dB
dB
%
LSB rms AC Grounded Input, 6 dB Gain Applied
dB
Measured with Step Change on Supply
12 dB Gain Applied
NOTES
1
Input signal characteristics defined as follows:
500mV TYP
RESET
TRANSIENT
150mV MAX
OPTICAL
BLACK PIXEL
1V MAX
INPUT
SIGNAL RANGE
Specifications subject to change without notice.
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