
ADATE207
TABLE OF CONTENTS
Features..............................................................................................1
Rev. 0 | Page 2 of 36
Applications.......................................................................................1
Functional Block Diagram..............................................................1
General Description.........................................................................1
Specifications.....................................................................................3
DC Specifications.........................................................................3
AC Specifications..........................................................................4
Timing Diagrams..........................................................................5
Absolute Maximum Ratings............................................................6
Thermal Resistance......................................................................6
Bypassing Scheme ........................................................................6
ESD Caution..................................................................................6
Pin Configurations and Function Descriptions...........................7
Theory of Operation......................................................................12
Waveform Memory....................................................................12
Event Generators........................................................................12
Delay Generation........................................................................12
Vernier Resolution .....................................................................12
Drive and Compare Logic......................................................... 13
Pipeline Considerations............................................................. 14
DUT Capture.............................................................................. 15
TMU Multiplexer....................................................................... 15
Low Jitter Clock Driver ............................................................. 15
Clock Generator Mode.............................................................. 15
Device Reset................................................................................ 15
Temperature Diode.................................................................... 17
High Speed Differential DCL Interface................................... 17
Control and Status Register Interface.......................................... 18
Read/Write Function................................................................. 18
Control and Status Registers......................................................... 21
Channel
S
pecific and
C
ommon
R
egisters.............................. 22
Chip-Specific (Common) Registers......................................... 30
A
pplication
Information.........................................
.......
............... 34
Time Measurement Support..................................................... 34
Outline Dimensions....................................................................... 35
Ordering Guide .......................................................................... 35
REVISION HISTORY
5/07—Revision 0: Initial Version