
ADATE207
Position
Bit 10
Rev. 0 | Page 33 of 36
Description
Channel 2 Timing Error. This indicates that the channel had a timing error. This signal is the Logic OR of
the timing error flags of the channel. More details of the error can be found by reading the error flags
for Channel 2.
Channel 1 Timing Error. This indicates that the channel had a timing error. This signal is the Logic OR of
the timing error flags of the channel. More details of the error can be found by reading the error flags
for Channel 1.
Channel 0 Timing Error. This indicates that the channel had a timing error. This signal is the Logic OR of
the timing error flags of the channel. More details of the error can be found by reading the error flags
for Channel 0.
Channel 3 High Comparator Output. This indicates the state of the high comparator. When high, the
DUT logic output is higher than the V
OH
. When low, the DUT output is lower than the V
OH
.
Channel 3 Low Comparator Output. This indicates the state of the low comparator. When low, the DUT
logic output is lower than the V
OL
. When high, the DUT output is higher than the V
OL
.
Channel 2 High Comparator Output. This indicates the state of the high comparator. When high, the
DUT logic output is higher than the V
OH
. When low, the DUT output is lower than the V
OH
.
Channel 2 Low Comparator Output. This indicates the state of the low comparator. When low, the DUT
logic output is lower than the V
OL
When high, the DUT output is higher than the V
OL
.
Channel 1 High Comparator Output. This indicates the state of the high comparator. When high, the
DUT logic output is higher than the V
OH
. When low, the DUT output is lower than the V
OH
.
Channel 1 Low Comparator Output. This indicates the state of the low comparator. When low, the DUT
logic output is lower than the V
OL
When high, the DUT output is higher than the V
OL
.
Channel 0 High Comparator Output. This indicates the state of the high comparator. When high, the
DUT logic output is higher than the V
OH
. When low, the DUT output is lower than the V
OH
.
Channel 0 Low Comparator Output. This indicates the state of the low comparator. When low, the DUT
logic output is lower than the V
OL
. When high, the DUT output is higher than the V
OL
.
Reset State
0x0
Bit 09
0x0
Bit 08
0x0
Bit 07
Undefined
Bit 06
Undefined
Bit 05
Undefined
Bit 04
Undefined
Bit 03
Undefined
Bit 02
Undefined
Bit 01
Undefined
Bit 00
Undefined
Name:
Address:
Type:
Chip Information
0x1F
Read
Table 39. Chip Information
Position
Bits[15:00]
Description
Reserved.
Reset State
N/A