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參數(shù)資料
| 型號： | ADATE207 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad Pin Timing Formatter |
| 中文描述： | 四針計(jì)時(shí)格式化 |
| 文件頁數(shù)： | 32/36頁 |
| 文件大小： | 374K |
| 代理商： | ADATE207 |
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ADATE207
Position
Bit 03
Bits[02:00]
Rev. 0 | Page 32 of 36
Description
0x0 selects Channel 0 comparator high.
0x1 selects Channel 0 comparator low.
0x2 selects Channel 1 comparator high.
0x3 selects Channel 1 comparator low.
0x4 selects Channel 2 comparator high.
0x5 selects Channel 2 comparator low.
0x6 selects Channel 3 comparator high.
0x7 selects Channel 3 comparator low.
TMU Arm Enable. A zero tristates the TMU Stop output.
TMU Arm Channel Select Multiplexer. A binary encoded data field.
0x0 selects Channel 0 comparator high.
0x1 selects Channel 0 comparator low.
0x2 selects Channel 1 comparator high.
0x3 selects Channel 1 comparator low.
0x4 selects Channel 2 comparator high.
0x5 selects Channel 2 comparator low.
0x6 selects Channel 3 comparator high.
0x7 selects Channel 3 comparator low.
Reset State
0
0x00
Name:
Address:
Type:
Channel Multiplex Enable
0x1D
Read/Write
Table 37. Channel Multiplex Enable
Position
Description
Bits[15:02]
Not Used.
Bit 01
CH2 Multiplex Enable. This channel can be 2-way multiplexed. Setting this bit to 1 enables Channel 3
to be multiplexed on Channel 2.
Bit 00
CH0 Multiplex Enable. This channel can be 2-way multiplexed. Setting this bit to 1 enables Channel 1
to be multiplexed on Channel 0.
Reset State
0x0000
0
0
Name:
Address:
Type:
Channel Status
0x1E
Read
Table 38. Channel Status
Position
Bit 15
Description
Channel 3 Failure. This indicates that the channel had a failure. This signal is the Logic OR of the
accumulated fail registers (AFRs) of the channel. More details of the fail can be found by reading the
AFRs or fail counter for Channel 3.
Channel 2 Failure. This indicates that the channel had a failure. This signal is the Logic OR of the
accumulated fail registers (AFRs) of the channel. More details of the fail can be found by reading the
AFRs or fail counter for Channel 2.
Channel 1 Failure. This indicates that the channel had a failure. This signal is the Logic OR of the
accumulated fail registers (AFRs) of the channel. More details of the fail can be found by reading the
AFRs or fail counter for Channel 1.
Channel 0 Failure. This indicates that the channel had a failure. This signal is the Logic OR of the
accumulated fail registers (AFRs) of the channel. More details of the fail can be found by reading the
AFRs or fail counter for Channel 0.
Channel 3 Timing Error. This indicates that the channel had a timing error. This signal is the Logic OR of
the timing error flags of the channel. More details of the error can be found by reading the error flags
for Channel 3.
Reset State
0x0
Bit 14
0x0
Bit 13
0x0
Bit 12
0x0
Bit 11
0x0
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