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參數資料
| 型號： | ADCMP580BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Ultrafast SiGe Voltage Comparator |
| 中文描述： | COMPARATOR, 5000 uV OFFSET-MAX, QCC16 |
| 封裝： | MO-220-VEED-2, LFCSP-16 |
| 文件頁數： | 10/16頁 |
| 文件大小： | 284K |
| 代理商： | ADCMP580BCP |
Preliminary Technical Data
ADCMP580/ADCMP581/ADCMP582
OPTIMIZING HIGH SPEED PERFORMANCE
As with any high speed comparator, proper design and layout
techniques are essential to obtaining the specified performance.
Stray capacitance, inductance, inductive power and ground
impedances, or other layout issues can severely limit
performance and can cause oscillation. Discontinuities along
input and output transmission lines can also severely limit the
specified pulse width dispersion performance.
Rev. PrA | Page 10 of 16
For applications working in a 50 environment, input and
output matching have a significant impact on data-dependant
(or deterministic) jitter (DJ) and pulse width dispersion
performance. The ADCMP58x family of comparators provides
internal 50 termination resistors for both V
P
and V
N
inputs.
The return side for each termination is pinned out separately
with the V
TP
and V
TN
pins, respectively. If the a 50 termination
is desired at one or both of the V
P
/V
N
inputs, the V
TP
and V
TN
pins can be connected (or disconnected) to (from) the desired
termination potential as appropriate. The termination potential
should be carefully bypassed using ceramic capacitors as
discussed previously to prevent undesired aberrations on the
input signal due to parasitic inductance in the termination
return path. If a 50 termination is not desired, either one or
both of the V
TP
/V
TN
termination pins can be left disconnected.
In this case, the open pins should be left floating with no
external pull downs or bypassing capacitors.
For applications that require high speed operation, but do not
have on-chip 50 termination resistors, some reflections
should be expected because the comparator inputs can no
longer provide matched impedance to the input trace leading
up to the device. It then becomes important to back-match the
drive source impedance to the input transmission path leading
to the input to minimize multiple reflections. For applications in
which the comparator is very close to the driving signal source,
the source impedance should be minimized. High source
impedance in combination with parasitic input capacitance of
the comparator could cause undesirable degradation in
bandwidth at the input, thus degrading the overall response.
Although the ADCMP58x family of comparators has been
designed to minimize input capacitance, some parasitic
capacitance is inevitable. It is therefore recommended that the
drive source impedance should be no more than 50 for best
high speed performance.
COMPARATOR PROPAGATION
DELAY DISPERSION
The ADCMP58x family of comparators has been specifically
designed to reduce propagation delay dispersion over a wide
input overdrive range of 5 mV to 500 mV. Propagation delay
dispersion is a change in propagation delays, which results from
a change in the degree of overdrive or slew rate (how far or fast
the input signal exceeds the switching threshold). The overall
result is a higher degree of timing accuracy.
Propagation delay dispersion is a specification which becomes
important in critical timing applications such as data
communication, automatic test and measurement,
instrumentation, and event driven applications such as pulse
spectroscopy, nuclear instrumentation, and medical imaging.
Dispersion is defined as the variation in the overall propagation
delay as the input overdrive conditions are changed (Figure 16
and Figure 17). For the ADCMP58x family of comparators,
dispersion is typically < 25 ps since the overdrive varies from
5 mV to 500 mV, and the input slew rate varies from 1 V/ns to
10 V/ns. This specification applies for both positive and
negative signals since the ADCMP58x family of comparators
has almost equal delays for positive- and negative-going inputs.
Q/Q OUTPUT
INPUT VOLTAGE
500mV OVERDRIVE
5mV OVERDRIVE
DISPERSION
V
N
± V
OS
0
Figure 16. Propagation Delay—Overdrive Dispersion
Q/Q OUTPUT
INPUT VOLTAGE
10V/ns
1V/ns
DISPERSION
V
N
± V
OS
0
Figure 17. Propagation Delay—Slew Rate Dispersion
相關PDF資料 |
PDF描述 |
|---|---|
| ADCMP581BCP | Ultrafast SiGe Voltage Comparator |
| ADCMP603BCPZ-WP | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| ADCMP603 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| ADCMP603BCPZ-R2 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| ADCMP603BCPZ-R7 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADCMP580BCP-R2 | 制造商:Analog Devices 功能描述:Comparator Single ±5.5V 16-Pin LFCSP EP T/R |
| ADCMP580BCP-RL7 | 制造商:Analog Devices 功能描述:Comparator Single ±5.5V 16-Pin LFCSP EP T/R |
| ADCMP580BCP-WP | 制造商:Analog Devices 功能描述:Comparator Single ±5.5V 16-Pin LFCSP EP 制造商:Analog Devices 功能描述:IC ((NS)) |
| ADCMP580BCPZ-R2 | 功能描述:IC COMPARATOR CML UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數:1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP580BCPZ-RL7 | 功能描述:IC COMPARATOR CML UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數:1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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