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參數資料
| 型號： | ADF4154BRU-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | Fractional-N Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 4000 MHz, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數： | 9/20頁 |
| 文件大小： | 470K |
| 代理商： | ADF4154BRU-REEL7 |
ADF4154
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The reference input stage is shown in Figure 17. SW1 and SW2
are normally closed switches. SW3 is normally open. When
power-down is initiated, SW3 is closed and SW1 and SW2 are
opened. This ensures that the REF
IN
pin is not loaded on
power-down.
Rev. 0 | Page 9 of 20
BUFFER
TO R COUNTER
REF
IN
100k
NC
SW2
SW3
NO
NC
SW1
POWER-DOWN
CONTROL
0
Figure 17. Reference Input Stage
RF INPUT STAGE
The RF input stage is shown in Figure 18. It is followed by a
2-stage limiting amplifier to generate the current mode logic
(CML) clock levels needed for the prescaler.
BIAS
GENERATOR
1.6V
AGND
AV
DD
2k
2k
RF
IN
B
RF
IN
A
0
Figure 18. RF Input Stage
RF INT DIVIDER
The RF INT CMOS counter allows a division ratio in the PLL
feedback counter. Division ratios from 31 to 511 are allowed.
INT, FRAC, MOD, AND R RELATIONSHIP
The INT, FRAC, and MOD values, in conjunction with the
R counter, make it possible to generate output frequencies that
are spaced by fractions of the phase frequency detector (PFD).
See the RF Synthesizer: A Worked Example section for more
information. The RF VCO frequency (
RF
OUT
) equation is
(
FRAC
INT
F
RF
PFD
OUT
)
(
)
MOD
+
×
=
(1)
where
RF
OUT
is the output frequency of the external voltage
controlled oscillator (VCO).
(
)
R
D
REF
F
IN
PFD
+
×
=
1
(2)
where:
REF
IN
is the reference input frequency.
D
is the
REF
IN
doubler bit.
R
is the preset divide ratio of binary 4-bit programmable
reference counter (1 to 15).
INT
is the preset divide ratio of binary 9-bit counter (31 to 511).
MOD
is the preset modulus ratio of binary 12-bit program-
mable FRAC counter (2 to 4095).
FRAC
is the preset fractional ratio of binary 12-bit
programmable FRAC counter (0 to MOD).
RF R COUNTER
The 4-bit RF R counter allows the input reference frequency
(REF
IN
) to be divided down to produce the reference clock to
the PFD. Division ratios from 1 to 15 are allowed.
THIRD ORDER
FRACTIONAL
INTERPOLATOR
FRAC
VALUE
MOD
REG
INT
REG
RF N-DIVIDER
N = INT + FRAC/MOD
FROM RF
INPUT STAGE
TO PFD
N COUNTER
0
Figure 19. A and B Counters
PHASE FREQUENCY DETECTOR (PFD) AND
CHARGE PUMP
The PFD takes inputs from the R counter and N counter and
produces an output proportional to the phase and frequency
difference between them. Figure 20 is a simplified schematic.
The PFD includes a fixed delay element that sets the width of
the antibacklash pulse, which is typically 3 ns. This pulse
ensures that there is no dead zone in the PFD transfer function
and gives a consistent reference spur level.
UP
HI
Q1
D1
U3
CLR2
D2
U2
Q2
DOWN
HI
CP
–IN
+IN
CHARGE
PUMP
DELAY
CLR1
U1
0
Figure 20. PFD Simplified Schematic
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADF4154BRUZ | 功能描述:IC FRAC-N FREQ SYNTH 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ADF4154BRUZ-RL | 功能描述:IC FRACTION-N FREQ SYNTH 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4154BRUZ-RL7 | 功能描述:IC FRACTION-N FREQ SYNTH 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
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| ADF4155BCPZ-RL7 | 功能描述:IC PLL FRAC-N FREQ SYNTH 20LFCSP 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態:有效 類型:* PLL:是 輸入:LVDS，LVPECL 輸出:時鐘 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/無 頻率 - 最大值:4GHz 分頻器/倍頻器:是/是 電壓 - 電源:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-WFQFN 裸露焊盤，CSP 供應商器件封裝:24-LFCSP-WQ（4x4） 標準包裝:1,500 |
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