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參數資料
型號: ADF7020BCP
廠商: ANALOG DEVICES INC
元件分類: 無繩電話/電話
英文描述: High Performance ISM Band FSK/ASK Transceiver IC
中文描述: TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, QCC48
封裝: 7 X 7 MM, LFCSP-48
文件頁數: 17/40頁
文件大?。?/td> 797K
代理商: ADF7020BCP
Preliminary Technical Data
ADF7020
RSSI/AGC SECTION
The RSSI is implemented as a successive compression log amp
following the base-band channel filtering. The log amp achieves
±3 dB log linearity. It also doubles as a limiter to convert the
signal-to-digital levels for the FSK demodulator. The RSSI itself
is used for amplitude shift keying (ASK) demodulation. In ASK
mode, extra digital filtering is performed on the RSSI value.
Offset correction is achieved using a switched capacitor integra-
tor in feedback around the log amp. This uses the BB offset
clock divide. The RSSI level is converted for user readback and
digitally controlled AGC by an 80-level (7-bit) flash ADC. This
level can be converted to input power in dBm.
Rev. PrH | Page 17 of 40
1
IFWR
IFWR
IFWR
IFWR
LATCH
A
A
A
R
CLK
ADC
OFFSET
CORRECTION
RSSI
ASK
DEMOD
FSK
DEMOD
0
Figure 15. RSSI Block Diagram
RSSI Thresholds
When the RSSI is above AGC_HIGH_THRESHOLD, the gain is
reduced. When the RSSI is below AGC_LOW_THRESHOLD,
the gain is increased. A delay (AGC_DELAY) is programmed to
allow for settling of the loop. The user programs the two
threshold values (recommended defaults, 27 and 76) and the
delay (default, 10). The default AGC setup values should be
adequate for most applications. The threshold values must be
chosen to be more than 30 apart for the AGC to operate
correctly.
Offset Correction Clock
In Register 3, the user should set the BB offset clock divide bits
R3_DB(4:5) to give an offset clock between 1 MHz and 2 MHz,
where:
BBOS _CLK
[Hz] =
XTAL/(BBOS_CLK_DIVIDE
)
BBOS_CLK_DIVIDE
can be set to 4, 8, or 16.
AGC Information
In Register 9, the user should select automatic gain control by
selecting auto in R9_DB18 and auto in R9_DB19. The user
should then program AGC low threshold R9_DB(4:10) and
AGC high threshold R9_DB(11:17). The recommended/default
values for the low and high thresholds are 30 and 70, respec-
tively. In the AGC2 register the user should program the AGC
delay to be long enough to allow the loop to settle. The
recommended value is 10.
RSSI Formula (Converting to dBm)
Input_Power
[dBm] = 110 dBm + (
Readback_Code
+
Gain_Mode_Correction
) × 0.5
where:
Readback_Code
is given by Bits RV7 to RV1 in the readback
register (see Readback Format section).
Gain_Mode_Correction
is given by the values in Table 6.
LNA gain and filter gain (LG2/LG1, FG2/FG1) are also obtained
from the readback register.
Table 6. Gain Mode Correction Table
LNA Gain
(LG2, LG1)
(FG2, FG1)
H (10)
H (10)
M (01)
H (10)
M (01)
M (01)
M (01)
L (00)
L (00)
L (00)
An additional factor should be introduced to account for losses
in the front-end matching network/antenna.
Filter Gain
Gain Mode Correction
0
11
19 + 11 = 30
19 + 19 + 11 = 49
19 + 19 + 19 + 11 = 68
FSK DEMODULATORS ON THE ADF7020
The two FSK demodulators on the ADF7020 are
FSK correlator/demodulator
Linear demodulator
Select these using the demod select bits, R4_DB(4:5).
FSK CORRELATOR/DEMODULATOR
The quadrature outputs of the IF filter are first limited and then
fed to a pair of digital frequency correlators that perform band-
pass filtering of the binary FSK frequencies at (IF + F
DEV
) and
(IF F
DEV
). Data is recovered by comparing the output levels
from each of the two correlators. The performance of this
frequency discriminator approximates that of a matched filter
detector, which is known to provide optimum detection in the
presence of AWGN.
P
D
D
S
IF – F
DEV
IF + F
DEV
I
IF
Q
LIMITERS
0
DB(4:13)
DB(8:15)
DB(14)
Rx DATA
Rx CLK
SLICER
FREQUENCY CORRELATOR
0
Figure 16. FSK Correlator/Demodulator Block Diagram
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ADF7020BCPZ-RL 功能描述:IC TX FSK/ASK ISM BAND 48LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 收發器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數據傳輸率 - 最大:54Mbps 調制或協議:* 應用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數據接口:PCB,表面貼裝 存儲容量:- 天線連接器:PCB,表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件
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