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參數資料
| 型號： | ADM1022 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low-Cost PC Temperature Monitor and Fan Control ASIC |
| 中文描述： | 低價電腦溫度監控和風扇控制ASIC |
| 文件頁數： | 11/19頁 |
| 文件大?。?/td> | 190K |
| 代理商： | ADM1022 |
REV. 0
ADM1022
–11–
ANALOG OUTPUT
The ADM1022 has a single analog output (FAN_SPD) from an
unsigned 8-bit DAC that produces 0 V–2.5 V. The analog out-
put register defaults to 00 during power-on reset, which produces
minimum fan speed. The analog output may be amplified and
buffered with external circuitry such as an op amp and transistor
to provide fan speed control.
Suitable fan drive circuits are given in Figures 14a to 14e. When
using any of these circuits, the following points should be noted:
1. All of these circuits will provide an output range from zero to
almost +V
FAN
.
2. To amplify the 2.5 V range of the analog output up to +V
FAN
,
the gain of these circuits needs to be set as shown.
3. Care must be taken when choosing the op amp to ensure that
its input common-mode range and output voltage swing are
suitable.
4. The op amp may be powered from the +V rail alone. If it
is powered from +V then the input common-mode range
should include ground to accommodate the minimum output
voltage of the DAC, and the output voltage should swing below
0.6 V to ensure that the transistor can be turned fully off.
5. In all these circuits, the output transistor must have an I
CMAX
greater than the maximum fan current, and be capable of dis-
sipating power due to the voltage dropped across it when the
fan is not operating at full speed.
6. If the fan motor produces a large back ElectroMotive Force
(EMF) when switched off, it may be necessary to add clamp
diodes to protect the output transistors in the event that the
output goes from full-scale to zero very quickly.
7. Pulling FAN_SPD/NTEST_IN high externally on power-up
causes NAND Test Mode to be invoked on the ADM1022.
Therefore, a 4.7 k
pull-down resistor should be added
externally to the FAN_SPD pin to prevent ADM1022 inad-
vertently entering the NAND Tree Test Mode.
Figure 14c shows how the
FAN_OFF
signal may be used (with
any of the control circuits) to gate the fan on and off indepen-
dent of the value on the FAN_SPD/NTEST_IN pin.
FAN_SPD
5V
Q1
NDT452 P
5V
FAN
R1
10k
R2
15k
+
AD8541
Figure 14a. 5 V Fan Circuit with Op Amp
12V
Q1
BD136
2SA968
R1
10k
R2
39k
R3
1k
R4
1k
+
AD8519
FAN_SPD
Figure 14b. 12 V Fan Circuit with Op Amp and PNP
Transistor
12V
R1
10k
R2
39k
R3
100k
Q1
NDT452 P
Q2
NDT3055L
R4
1k
3.3V
FAN_OFF
+
AD8519
FAN_SPD
Figure 14c. 12 V Fan Circuit with Op Amp and P-Channel
MOSFET
12V
Q3
NDT452 P
R4
100k
R2
3.9k
R1
1k
R3
100k
FAN_SPD
R5
5k
Q1/Q2
MBT3904
DUAL
Figure 14d. Discrete 12 V Fan Drive Circuit with
P-Channel MOSFET, Single Supply
12V
Q4
BD132
TIP32A
R4
100k
R5
100k
FAN_SPD
R6
5k
Q1/Q2
MBT3904
DUAL
R2
3.9k
R1
1k
R3
100
Q3
BC556
2N3906
Figure 14e. Discrete 12 V Fan Drive Circuit with Bipolar
Output Single Supply
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