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參數資料
| 型號： | ADM1022 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low-Cost PC Temperature Monitor and Fan Control ASIC |
| 中文描述： | 低價電腦溫度監控和風扇控制ASIC |
| 文件頁數： | 3/19頁 |
| 文件大小： | 190K |
| 代理商： | ADM1022 |
REV. 0
–3–
ADM1022
Parameter
Min
Typ
Max
Unit
Test Conditions
DIGITAL INPUT LOGIC LEVELS
(FAN_SPD/NTEST_IN,
ADD/NTEST_OUT,
MR
, GPI)
Input High Voltage, V
IH
Input Low Voltage, V
IL
DIGITAL INPUT LEAKAGE CURRENT
(ALL DIGITAL INPUTS)
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
SERIAL BUS TIMING
3
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
Start Setup Time, t
SU:STA
Start Hold Time, t
HD:STA
Stop Condition Setup Time, t
SU:STO
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
R
SCL, SDA Fall Time, t
F
Data Setup Time, t
SU:DAT
Data Hold Time, t
HD:DAT
2.2
V
V
0.8
–1
–0.005
+0.005
5
μ
A
μ
A
pF
V
IN
= V
CC
V
IN
= 0
+1
400
kHz
ns
μ
s
ns
ns
ns
μ
s
μ
s
ns
ns
ns
ns
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
50
1.3
600
600
600
1.3
0.6
300
300
100
300
NOTES
1
Typicals are at T
A
= 25
°
C and represent most likely parametric norm. Standby current typ is measured with V
CC
= 3.3 V.
2
ADD is a three-state input that may be pulled high, low or left open-circuit.
3
Timing specifications are tested at logic levels of V
IL
= 0.8 V for a falling edge and V
IH
= 2.2 V for a rising edge.
Specifications subject to change without notice.
P
S
P
t
HD;STA
t
SU;STA
t
SU;DAT
t
HIGH
t
F
t
HD;DAT
t
R
t
LOW
t
HD;STA
t
BUF
S
SCL
SDA
t
SU;STO
Figure 1. Diagram for Serial Bus Timing
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