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參數資料
| 型號： | ADM1024ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Circular Connector; No. of Contacts:8; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:17-8 |
| 中文描述： | 9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24 |
| 封裝： | MO-153AD, TSSOP-24 |
| 文件頁數： | 24/28頁 |
| 文件大?。?/td> | 285K |
| 代理商： | ADM1024ARU |
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ADM1024
–24–
REV. 0
Table VII (continued)
Hex
Address
Power-On Value
(Binary Bit 7–0)
Description
Notes
35h
36h
37h
V
CCP2
High Limit
V
CCP2
Low Limit
Ext Temp1. High Limit
Indeterminate
Indeterminate
Indeterminate
Stores high limit for a diode sensor connected to Pins 13
and 14.
Stores low limit for a diode sensor connected to Pins 13
and 14.
Stores the high limit for the internal temperature reading.
Stores the low limit for the internal temperature reading.
Stores high limit for AIN1 or FAN1, depending on the
configuration of Pin 5.
Stores high limit for AIN2 or FAN2, depending on the
configuration of Pin 6.
38h
Ext Temp1. Low Limit
Indeterminate
39h
3Ah
3Bh
Internal Temp. High Limit
Internal Temp. Low Limit
AIN1/FAN1 High Limit
Indeterminate
Indeterminate
Indeterminate
3Ch
AIN2/FAN2 High Limit
Indeterminate
3Dh
3Eh
Reserved
Company ID Number
Indeterminate
0100 0001
This location will contain the company identification number
(Read Only).
Last four bits of this location will contain the revision number
of the part. (Read Only)
See Table IX.
See Table X.
See Table XI.
See Table XII.
See Table XIII.
See Table XIV.
See Table XV.
See Table XVI.
See Table XVII.
See Table XVIII.
3Fh
Revision Number
0001 nnnn
40h
41h
42h
43h
44h
46h
47h
49h
4Ah
4Ch
Configuration Register 1
Interrupt INT Status Register 1
Interrupt INT Status Register 2
INT Mask Register 1
INT Mask Register 2
Chassis Intrusion Clear Register
VID 0–3/Fan Divisor Register
VID4 Register
Configuration Register 2
Interrupt Status Register
Mirror No. 1
Interrupt Status Register
Mirror No. 2
0000 1000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0101 (VID3–VID0)
1000 000 (VID4)
0000 0000
0000 0000
4Dh
0000 0000
See Table XIX.
Table VIII. Register 16h, Channel Mode Register (Power-On Default = 00h)
Bit
Name
R/
W
Description
0
FAN1/AIN1
R/
W
Clearing this bit to 0 configures Pin 5 as FAN1 input. Setting this bit to 1 configures Pin 5 as AIN1.
Power-on default = 0.
Clearing this bit to 0 configures Pin 6 as FAN2 input. Setting this bit to 1 configures Pin 6 as AIN2.
Power-on default = 0.
Clearing this bit to 0 configures Pins 17 and 18 to measure 2.5 V and V
CCP2
. Setting this bit to 1
configures Pins 18 and 19 as an input for a second remote temperature-sensing diode. Power-on
default = 0.
Clearing this bit to 0 sets the measurement range for the internal V
CC
measurement to 3.3 V. Setting
this bit to 1 sets the internal V
CC
measurement range to 5 V. Power-on default = 0.
Setting this bit to 1 enables Pin 24 as an active high interrupt input, provided Pins 20 to 24 have
been configured as interrupts by setting Bit 7 of the Channel Mode Register. Power-on default = 0.
Setting this bit to 1 enables Pin 23 as an active high interrupt input, provided have been configured
as interrupts by setting Bit 7 of the Channel Mode Register. Power-on default = 0.
Setting this bit to 1 enables Pin 22 as an active high interrupt input, provided Pins 20 to 24 have
been configured as interrupts by setting Bit 7 of the Channel Mode Register. Power-on default = 0.
Clearing this bit to 0 configures Pins 20 to 24 as processor voltage ID inputs. Setting this bit to 1
configures Pins 20 to 24 as interrupt inputs. Power-on default = 0.
1
FAN2/AIN2
R/
W
2
2.5 V, V
CCP
/D2
R/
W
3
Int V
CC
R/
W
4
IRQ0 EN
R/
W
5
IRQ1 EN
R/
W
6
IRQ2 EN
R/
W
7
VID/IRQ
R/
W
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