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參數資料
| 型號： | ADM1026 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete Thermal and System Management Controller |
| 中文描述： | 完整的熱和系統管理控制器 |
| 文件頁數： | 19/56頁 |
| 文件大小： | 634K |
| 代理商： | ADM1026 |
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ADM1026
Symmetrical bipolar input ranges can be accommodated easily
by making V
OS
equal to the full-scale voltage of the analog input,
and by adding a third resistor to set the positive full scale.
Rev. A | Page 19 of 56
R1
R2
V
IN
A
IN(0–9)
R3
+V
OS
0
Figure 30. Scaling and Offsetting A
IN0
A
IN9
for Bipolar Inputs
OS
fs
V
V
R2
R1
=
Note that R3 has no effect as the input voltage at the device pin
is zero when V
IN
= negative full scale.
(
IN0
A
R3
0
(
IN6
A
R3
5
)
(
)
IN5
fs
A
V
R1
to
for
0
=
)
(
)
IN9
fs
A
V
R1
to
for
5
=
Also, note that R2 has no effect as the input voltage at the device
pin is equal to V
OS
when V
IN
= positive full scale.
Battery Measurement Input (V
BAT
)
The V
BAT
input allows the condition of a CMOS backup battery
to be monitored. This is typically a lithium coin cell such as a
CR2032. The V
BAT
input is accurate only for voltages greater
than 1.5 V (see Figure 15). Typically, the battery in a system is
required to keep some device powered on when the system is in
a powered-off state. The V
BAT
measurement input is specially
designed to minimize battery drain. To reduce current drain
from the battery, the lower resistor of the V
BAT
attenuator is not
connected, except whenever a V
BAT
measurement is being made.
The total current drain on the V
BAT
pin is 80 nA typical (for a
maximum V
BAT
voltage = 4 V), so a CR2032 CMOS battery
functions in a system in excess of the expected 10 years. Note
that when a V
BAT
measurement is not being made, the current
drain is reduced to 6 nA typical. Under normal voltage meas-
urement operating conditions, all measurements are made in a
round-robin format, and each reading is actually the result of
16 digitally averaged measurements. However, averaging is not
carried out on the V
BAT
measurement to reduce measurement
time and therefore reduce the current drain from the battery.
The V
BAT
current drain when a measurement is being made is
calculated by
PERIOD
T
PULSE
T
BAT
k
V
I
×
=
Ω
100
For example, when
V
BAT
= 3 V,
A
n
78
ms
273
711
Ω
k
100
V
3
=
μ
×
=
s
I
where
T
PULSE
=
V
BAT
measurement time (711 μs typical),
T
PERIOD
= time to measure all analog inputs (273 ms typical),
and V
BAT
input battery protection.
V
BAT
Input Battery Protection
In addition to minimizing battery current drain, the V
BAT
measurement circuitry was specifically designed with battery
protection in mind. Internal circuitry prevents the battery from
being back-biased by the ADM1026 supply or through any
other path under normal operating conditions. In the unlikely
event of a catastrophic ADM1026 failure, the ADM1026
includes a second level of battery protection including a series
3 k resistor to limit current to the battery, as recommended by
UL. Thus, it is not necessary to add a series resistor between the
battery and the V
BAT
input; the battery can be connected directly
to the V
BAT
input to improve voltage measurement accuracy.
ADC
V
BAT
DIGITAL
CONTROL
49.5k
82.7k
4.5pF
3k
3k
0
Figure 31. Equivalent V
BAT
Input Protection Circuit
Reference Output (V
REF
)
The ADM1026 offers an on-chip reference voltage (Pin 24) that
can be used to provide a 1.82 V or 2.5 V reference voltage out-
put. This output is buffered and specified to sink or source a
load current of 2 mA. The reference voltage outputs 1.82 V if
Bit 2 of Configuration Register 3 (Address 07h) is 0; it outputs
2.5 V when this bit is set to 1. This voltage reference output can
be used to provide a stable reference voltage to external cir-
cuitry such as LDOs. The load regulation of the V
REF
output is
typically 0.15% for a sink current of 2 mA and 0.15% for 2 mA
source current. There may be some ripple present on the V
REF
output that requires filtering (±4 m V
MAX
). Figure 32 shows the
recommended circuitry for the V
REF
output for loads less than
2 mA. For loads in excess of 2 mA, external circuitry, such as
that shown in Figure 33, can be used to buffer the V
REF
output.
10k
0.1
μ
F
V
REF
ADM1026
24
V
REF
0
Figure 32. V
REF
Interface Circuit for V
REF
Loads < 2 mA
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