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參數資料
| 型號： | ADM1026 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete Thermal and System Management Controller |
| 中文描述： | 完整的熱和系統管理控制器 |
| 文件頁數： | 42/56頁 |
| 文件大小： | 634K |
| 代理商： | ADM1026 |
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ADM1026
Rev. A | Page 42 of 56
Table 31. Register 12h, TDM2 Temperature T
MIN
(Power-On Default 40h, 64°C)
Bit
Name
R/W
Description
7–0
TDM2 Temp T
MIN
R/W
This register contains the T
MIN
value for automatic fan speed control based on the TDM2 temperature
channel.
Table 32. Register 13h, EEPROM Register 3 (Power-On Default 00h)
Bit
Name
R/W
0
Read
R/W
1
Write
R/W
2
Erase
R/W
3
Write Protect
Once
4
Test Mode Bit 0
R/W
5
Test Mode Bit 1
R/W
6
Test Mode Bit 2
R/W
Clock Extend
R/W
Description
Setting this bit puts the EEPROM into read mode.
Setting this bit puts the EEPROM in write (program) mode.
Setting this bit puts the EEPROM into erase mode.
Setting this bit protects the EEPROM against accidental writing or erasure. This bit is write-once and
can only be cleared by a power-on reset.
Test mode bits. For factory use only
Test mode bits. For factory use only.
Test mode bits. For factory use only
Setting this bit enables SMBus clock extension. The ADM1026 can pull SCL low to extend the clock
pulse if it cannot accept any more data. It is recommended to set this bit to 1 to extend the clock
pulse during repeated EEPROM write or block write operations.
R/W
7
Table 33. Register 14h, Manufacturer’s Test Register 1 (Power-On Default 00h)
Bit
Name
R/W
7–0
Manufacturer’s Test 1
R/W
Description
This register is used by the manufacturer for test purposes. It should not be read from or written
to in normal operation.
Table 34. Register 15h, Manufacturer’s Test Register 2 (Power-On Default 00h)
Bit
Name
R/W
7–0
Manufacturer’s Test 2 R/W
Description
This register is used by the manufacturer for test purposes. It should not be read from or written
to in normal operation.
Table 35. Register 16h, Manufacturer’s ID (Power-On Default 41h)
Bit
Name
7–0
Manufacturer’s ID Code
R/W
R
Description
This register contains the manufacturer’s ID code.
Table 36. Register 17h, Revision Register (Power-On Default 4xh)
Bit
Name
3–0
Minor Revision Code
R/W
R
Description
This nibble contains the manufacturer’s code for minor revisions to the device. Rev 1 = 0h,
Rev 2 = 1h, and so on.
This nibble denotes the generation of the device. For the ADM1026, this nibble reads 4h.
7–4
Major Revision Code
R
Table 37. Register 18h, Mask Register 1 (Power-On Default 00h)
Bit Name
R/W
0
Ext1 Temp Mask = 0
R/W
1
Ext2 Temp
R/W
2
3.3 V STBY Mask = 0
R/W
3
3.3 V MAIN Mask = 0
R/W
4
+5 V Mask = 0
R/W
5
V
CCP
Mask = 0
R/W
6
+12 V Mask = 0
R/W
7
12 V Mask = 0
R/W
Description
When this bit is set, interrupts generated on the
Ext1 temperature channel are masked out.
When this bit is set, interrupts generated on the
Ext2/A
IN9
channel are masked out.
When this bit is set, interrupts generated on the
3.3 V STBY voltage channel are masked out.
When this bit is set, interrupts generated on the
3.3 V MAIN voltage channel are masked out.
When this bit is set, interrupts generated on the
+5 V voltage channel are masked out.
When this bit is set, interrupts generated on the
V
CCP
voltage channel are masked out.
When this bit is set, interrupts generated on the
+12 V voltage channel are masked out.
When this bit is set, interrupts generated on the
12 V voltage channel are masked out.
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