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參數(shù)資料
| 型號(hào)： | ADM1064 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Super Sequencer with Voltage Readback ADC |
| 中文描述： | 超級(jí)序列與ADC的電壓回讀 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大小： | 523K |
| 代理商： | ADM1064 |
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ADM1064
Parameter
Input Reference Voltage on REFIN Pin,
V
REFIN
Resolution
INL
Gain Error
Conversion Time
Offset Error
Input Noise
REFERENCE OUTPUT
Reference Output Voltage
Load Regulation
Minimum Load Capacitance
Load Regulation
PSRR
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge Pump) Mode
(PDO1–6)
Output Impedance
V
OH
I
OUTAVG
Standard (Digital Output) Mode (PDO1–10)
V
OH
V
OL
I
OL2
I
SINK 2
R
PULL-UP
I
SOURCE
(VPn)
2
Rev. 0 | Page 5 of 32
Min
Typ
2.048
Max
Unit
V
Test Conditions/Comments
2.043
1
12
0.44
84
0.25
2.048
0.25
0.25
2
60
±2.5
±0.05
±2
2.053
Bits
LSB
%
ms
ms
LSB
LSB
rms
V
mV
mV
μF
mV
dB
Endpoint corrected, V
REFIN
= 2.048 V
V
REFIN
= 2.048 V
One conversion on one channel
All 12 channels selected, 16x averaging enabled
V
REFIN
= 2.048 V
Direct input (no attenuator)
No load
Sourcing current, I
DACnMAX
= 100 μA
Sinking current, I
DACnMAX
= 100 μA
Capacitor required for decoupling, stability
Per 100 μA
DC
11
10.5
2.4
V
PU
0.3
0
500
12.5
12
20
20
14
13.5
4.5
0.50
20
60
2
k
V
V
μA
V
V
V
V
mA
mA
k
mA
I
OH
= 0
I
OH
= 1μA
2 V < V
OH
< 7 V
V
PU
(pull-up to VDDCAP or V
PN
) = 2.7 V, I
OH
= 0.5 mA
V
PU
to V
pn
= 6.0 V, I
OH
= 0 mA
V
PU
≤ 2.7 V, I
OH
= 0.5 mA
I
OL
= 20 mA
Maximum sink current per PDO pin
Maximum total sink for all PDOs
Internal pull-up
Current load on any VPn pull-ups, that is, total
source current available through any number of
PDO pull-up switches configured onto any one
V
PDO
= 14.4 V
All on-chip time delays derived from this clock
Maximum V
IN
= 5.5 V
Maximum V
IN
= 5.5 V
V
IN
= 5.5 V
V
IN
= 0
VDDCAP = 4.75, T
A
= 25°C, if known logic state is
required
I
OUT
= 3.0 mA
Three-State Output Leakage Current
Oscillator Frequency
DIGITAL INPUTS (VXn, A0, A1)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance
Programmable Pull-Down Current,
I
PULL-DOWN
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Output Low Voltage, V
OL2
90
2.0
1
100
5
20
10
110
0.8
1
μA
kHz
V
V
μA
μA
pF
μA
2.0
0.8
0.4
V
V
V
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PDF描述 |
|---|---|
| ADM1064ACP | Super Sequencer with Voltage Readback ADC |
| ADM1064ACP-REEL | Super Sequencer with Voltage Readback ADC |
| ADM1064ACP-REEL7 | Super Sequencer with Voltage Readback ADC |
| ADM1064ASU | Super Sequencer with Voltage Readback ADC |
| ADM1064ASU-REEL | Super Sequencer with Voltage Readback ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM1064ACP | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP |
| ADM1064ACP-REEL | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
| ADM1064ACP-REEL7 | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
| ADM1064ACPZ | 功能描述:IC SEQUENCER/SUPERVISOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 標(biāo)準(zhǔn)包裝:1 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:高有效 復(fù)位超時(shí):- 電壓 - 閥值:1.8V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:6-TSOP（0.059"，1.50mm 寬）5 引線 供應(yīng)商設(shè)備封裝:5-TSOP 包裝:剪切帶 (CT) 其它名稱:NCP301HSN18T1GOSCT |
| ADM1064ASU | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 48-Pin TQFP |
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