- 您現在的位置：買賣IC網 > PDF目錄374016 > ADMCF340BST (ANALOG DEVICES INC) DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End PDF資料下載
參數資料
| 型號： | ADMCF340BST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| 中文描述： | 0-BIT, 10 MHz, OTHER DSP, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數： | 26/40頁 |
| 文件大小： | 415K |
| 代理商： | ADMCF340BST |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
REV. 0
ADMCF340
–26–
Also SPORT1 Flag signal (FL1) is externally available through
the FL1/DT1 Pin. This signal is used to drive the external serial
memory input reset.
With SPORT1 configured in UART Mode, the SPORT0 serial
clock (SCLK0) is externally available through the SCLK1/
SCLK0 Pin. The SPORT1 data transmit (DT1) is externally
available through the FL1/DT1 Pin.
SPORT0 Configuration
SPORT0 can be configured in the following modes:
SPORT Mode
UART Mode
SPI Mode
SPORT0 can be configured for UART Mode. In this mode,
the DR0 and RFS0 signals of the internal serial port are
connected together.
DSP
CORE
SPORT1
DT1
FL1
TFS1
RFS1
DR1
SCLK1
DSP
CORE
SPORT0
SCLK0
DT0
DR0
TFS0
RFS0
SPI
CONTROL
BLOCK
MODECTRL REGISTER (04)
SPORT1 BOOT MODE/UART MODE
MODECTRL REGISTER (15)
SPORT0 SPORT MODE/UART MODE
MODECTRL REGISTER (14..13..12)
SPORT0 SPI INTERFACE CONTROL
DT1/FL1
DR1
SCLK1/SCLK0
DT0
DR0
TFS0
RFS0
ADMCF340
Figure 18. SPORT0 and SPORT1 Internal Multiplexing (Simplied Diagram)
SPORT0 can be configured to operate as master SPI interface.
The SPI Mode is set through Bit 14 of MODECTRL Register.
When SPORT0 is configured as SPI interface, the SPORT I/O
pins assume the configuration shown in Table XI.
The Slave Select Pin automatically generates the select signal at
each word transfer. This pin can also be used as a general purpose
I/O during the SPI transfer without affecting the SPORT operations.
The SPI clock polarity and phase are configurable through
Bits 13 and 12 of MODECTRL Register. The SPI transfer using
clock phase is shown in Figure 19 and Figure 20.
相關PDF資料 |
PDF描述 |
|---|---|
| ADMCF340-EVALKIT | Circular Connector; No. of Contacts:7; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:10-99 RoHS Compliant: No |
| ADMCF341 | DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF341BR | DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF341-EVALKIT | DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADN2811 | OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADMCF340-EVALKIT | 制造商:AD 制造商全稱:Analog Devices 功能描述:DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF340XSTB | 制造商:Analog Devices 功能描述: |
| ADMCF341 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF341BR | 制造商:Analog Devices 功能描述:DSP Fixed-Point/Floating-Point 16-Bit 20MHz 20MIPS 28-Pin SOIC W T/R |
| ADMCF341BRZ-REEL | 制造商:Analog Devices 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。