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參數(shù)資料
| 型號： | ADMCF340BST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| 中文描述： | 0-BIT, 10 MHz, OTHER DSP, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 35/40頁 |
| 文件大小： | 415K |
| 代理商： | ADMCF340BST |
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REV. 0
ADMCF340
–35–
0
0
0
0
DM (0x2000)
ADC1 (R)
8
15
14
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9
7
6
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4
3
2
1
0
0
0
0
0
DM (0x2001)
ADC2 (R)
8
15
14
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12
11
10
9
7
6
5
4
3
2
1
0
0
0
0
0
DM (0x2002)
ADC3 (R)
8
15
14
13
12
11
10
9
7
6
5
4
3
2
1
0
0
0
0
0
DM (0x2003)
ADCAUX (R)
8
15
14
13
12
11
10
9
7
6
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4
3
2
1
0
DM (0x2068)
ICONST_TRIM (R/W)
9
8
15
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11
10
7
6
5
4
3
2
1
0
ICONST MIN = BITS 0–2 CLEARED.
ICONST MAX = BITS 0–2 SET.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SHA1_TM (R/W)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
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12
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4
3
2
1
0
DM (0x2069)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
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11
10
9
8
7
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3
2
1
0
DM (0x206A)
SHA2 _TM (R/W)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
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1
0
DM (0x206B)
SHA3 _TM (R/W)
CONVERSION
STATUS
0 = DATA READY
1 = NOT READY
CONVERSION
STATUS
0 = DATA READY
1 = NOT READY
CONVERSION
STATUS
0 = DATA READY
1 = NOT READY
Figure 27. Configuration of ADC Registers
Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these
bits should always be written as shown.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADMCF340-EVALKIT | 制造商:AD 制造商全稱:Analog Devices 功能描述:DashDSPTM 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF340XSTB | 制造商:Analog Devices 功能描述: |
| ADMCF341 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| ADMCF341BR | 制造商:Analog Devices 功能描述:DSP Fixed-Point/Floating-Point 16-Bit 20MHz 20MIPS 28-Pin SOIC W T/R |
| ADMCF341BRZ-REEL | 制造商:Analog Devices 功能描述: |
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