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參數資料
| 型號： | ADP3179JRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩壓器 |
| 英文描述： | PRECISION THERMOSTATS |
| 中文描述： | SWITCHING CONTROLLER, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數： | 6/16頁 |
| 文件大小： | 231K |
| 代理商： | ADP3179JRU |
REV. A
–6–
ADP3159/ADP3179
On-board Linear Regulator Controllers
The ADP3159 and ADP3179 include two linear regulator controllers
to provide a low cost solution for generating additional supply rails.
In the ADP3159, these regulators are internally set to 2.5 V (LR1)
and 1.8 V (LR2) with
±
2.5% accuracy. The ADP3179 is designed
to allow the outputs to be set externally using a resistor divider.
The output voltage is sensed by the high input impedance LRFB(x)
pin and compared to an internal fixed reference.
The LRDRV(x) pin controls the gate of an external N-channel
MOSFET resulting in a negative feedback loop. The only addi-
tional components required are a capacitor and resistor for
stability. Higher output voltages can be generated by placing
a resistor divider between the linear regulator output and its
respective LRFB pin. The maximum output load current is
determined by the size and thermal impedance of the external
power MOSFET that is placed in series with the supply and
controlled by the ADP3159.
The linear regulator controllers have been designed so that they
remain active even when the switching controller is in UVLO
mode to ensure that the output voltages of the linear regulators
will track the 3.3 V supply as required by Intel design specifica-
tions. By diode ORing the VCC input of the IC to the 5 VSB
and 12 V supplies as shown in Figure 3, the switching output
will be disabled in standby mode, but the linear regulators will
begin conducting once VCC rises above about 1 V. During
Figure 3. 15 A Pentium III Application Circuit
start-up the linear outputs will track the 3.3 V supply up until
they reach their respective regulation points, regardless of the
state of the 12 V supply. Once the 12 V supply has exceeded the
5 VSB supply by more than a diode drop, the controller IC
will track the 12 V supply. Once the 12 V supply has risen
above the UVLO value, the switching regulator will begin its
start-up sequence.
Table I. Output Voltage vs. VID Code
VID3
VID2
VID1
VID0
V
OUT(NOM)
1.30 V
1.35 V
1.40 V
1.45 V
1.50 V
1.55 V
1.60 V
1.65 V
1.70 V
1.75 V
1.80 V
1.85 V
1.90 V
1.95 V
2.00 V
2.05 V
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
VID0
VID1
VID2
VID3
LRFB1
LRDRV1
CS
–
GND
DRVH
DRVL
VCC
LRFB2
LRDRV2
COMP
CT
FROM CPU
C1
100 F
C15
1 F
C5
100 F
Q2
SUB45N03-13L
C16
1 F
Q1
SUB45N03-13L
R8
78.7k
C4
2.7nF
3.3V
C17 C18C19 C20 C21
V
LR2
1.8V,
2A
R12
4m
L1
1.7 H
Q4
SUB45N03-13L
Q3
SUB75N03-07
C8
1000 F
C9
1000 F
C7
22 F
L2
1 H
VCC CORE
1.30V TO
2.05V
15A
5V
5V STANDBY
12V
D3
MBR052LT1
D2
MBR052LT1
V
LR1
2.5V, 2A
C6
1 F
C10
1nF
3.3V
CS+
FB
NC
NC
PWRGD
POWER
GOOD
R4
220
R3
220
5V
R1
10k
R7
10.5k
C3
150pF
1000 Fx5
24m
(EACH)
ADP3159/
ADP3179
U1
+
+
+
+
+
+
+
+
+
+
10
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
R2
10k
C2
68pF
C11
68pF
R11
10k
NC = NO CONNECT
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