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參數資料
型號: ADP3180JRU-REEL7
廠商: ANALOG DEVICES INC
元件分類: 穩壓器
英文描述: 6-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck Controller
中文描述: SWITCHING CONTROLLER, 4000 kHz SWITCHING FREQ-MAX, PDSO28
封裝: MO-153-AE, TSSOP-28
文件頁數: 18/20頁
文件大小: 529K
代理商: ADP3180JRU-REEL7
ADP3180
–18–
10. Measure output ripple at no-load and full-load with scope
and make sure it is within spec.
AC Loadline Setting
11. Remove dc load from circuit and hook up dynamic load.
12. Hook up scope to output voltage and set to dc coupling
with time scale at 100 μs/div.
13. Set dynamic load for a transient step of about 40 A at 1 kHz
with 50% duty cycle.
14. Measure output waveform (may have to use dc offset on
scope to see waveform). Try to use vertical scale of
100 mV/div or finer.
15. You will see a waveform that looks something like Figure 8.
Use the horizontal cursors to measure V
ACDRP
and V
DCDRP
as shown. DO NOT MEASURE THE UNDERSHOOT
OR OVERSHOOT THAT HAPPENS IMMEDIATELY
AFTER THE STEP.
V
ACDRP
V
DCDRP
Figure 8. AC Loadline Waveform
16. If the V
ACDRP
and V
DCDRP
are different by more than a
couple of millivolts, use Equation 38 to adjust
C
CS
. You may
need to parallel different values to get the right one since
there are limited standard capacitor values available (it is a
good idea to have locations for two capacitors in the layout
for this).
C
C
V
V
CS NEW
CS OLD
ACDRP
DCDRP
)
)
=
×
(38)
17. Repeat Steps 11 to 13 and repeat adjustments if necessary.
Once complete, do not change
C
CS
for the rest of the
procedure.
18. Set dynamic load step to maximum step size (do not use a
step size larger than needed) and verify that the output wave-
form is square (which means V
ACDRP
and V
DCDRP
are equal).
NOTE: MAKE SURE LOAD STEP SLEW RATE AND
TURN-ON ARE SET FOR A SLEW RATE OF
~150–250 A/μs (for example, a load step of 50 A should take
200 ns–300 ns) WITH NO OVERSHOOT. Some dynamic
loads will have an excessive turn-on overshoot if a minimum
current is not set properly (this is an issue if using a VTT tool).
Initial Transient Setting
19. With dynamic load still set at maximum step size, expand
scope time scale to see 2 μs/div to 5 μs/div. You will see a wave-
form that may have two overshoots and one minor undershoot
(see Figure 9). Here, V
DROOP
is the final desired value.
V
DROOP
V
TRAN1
V
TRAN2
Figure 9. Transient Setting Waveform
20. If both overshoots are larger than desired, try making the
following adjustments in this order. (NOTE: If these adjust-
ments do not change the response, you are limited by the
output decoupling.) Check the output response each time
you make a change as well as the switching nodes (to make
sure it is still stable).
a. Make ramp resistor larger by 25% (R
RAMP
).
b. For V
TRAN1
, increase C
B
or increase switching frequency.
c. For V
TRAN2
, increase R
A
and decrease C
A
by 25%.
21. For load release (see Figure 10), if V
TRANREL
is larger than
V
TRAN1
(see Figure 9), you do not have enough output
capacitance. You will either need more capacitance or to
make the inductor values smaller (if you change inductors,
you need to start the design over using the spreadsheet and
this tuning procedure).
V
DROOP
V
TRANREL
Figure 10. Transient Setting Waveform
Since the ADP3180 turns off all of the phases (switches inductors
to ground), there is no ripple voltage present during load release.
Thus, you do not have to add headroom for ripple, allowing your
load release V
TRANREL
to be larger than V
TRAN1
by that amount
and still be meeting spec.
If V
TRAN1
and V
TRANREL
are less than the desired final droop, this
implies that capacitors can be removed. When removing capaci-
tors, make sure to check the output ripple voltage as well to make
sure it is still within spec.
REV. 0
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相關代理商/技術參數
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