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參數(shù)資料
| 型號： | ADT7518ARQZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 31/40頁 |
| 文件大小： | 891K |
| 描述： | IC SENSOR TEMP QD ADC/DAC 16QSOP |
| 標準包裝： | 98 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應溫度： | -40°C ~ 120°C，外部傳感器 |
| 精確度： | ±3°C（最小值） |
| 拓撲： | ADC，比較器，多路復用器，寄存器庫 |
| 輸出類型： | I²C?，MICROWIRE?，QSPI?，SPI? |
| 輸出警報： | 無 |
| 輸出風扇： | 無 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 120°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-QSOP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 798 (CN2011-ZH PDF) |
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ADT7518
Rev. A | Page 31 of 40
Interrupt Mask 2 Register (Read/Write) [Address = 1Eh]
This mask register is an 8-bit read/write register that can be
used to mask any interrupts that can cause the INT/INT
pin to
go active.
Table 41. Interrupt Mask 2
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
0*
0*
0*
0*
0*
0*
0*
* Default settings at power-up
Table 42.
Bit
Function
D0:D3
Reserved. Write 0s only.
D4
0 = Enable VDD interrupts.
1 = Disable V
DD
interrupts.
D5:D7
Reserved. Write 0s only.
Internal Temperature Offset Register (Read/Write)
[Address = 1Fh]
This register contains the offset value for the internal temp-
erature channel. A twos complement number can be written to
this register which is then added to the measured result before it
is stored or compared to limits. In this way, a one-point cali-
bration can be done whereby the whole transfer function of the
channel can be moved up or down. From a software point of
view, this may be a very simple method to vary the charac-
teristics of the measurement channel if the thermal charac-
teristics change. Because it is an 8-bit register, the temperature
resolution is 1癈.
Table 43. Internal Temperature Offset
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
0*
0*
0*
0*
0*
0*
0*
* Default settings at power-up
External Temperature Offset Register (Read/Write)
[Address = 20h]
This register contains the offset value for the external temp-
erature channel. A twos complement number can be written to
this register, which is then added to the measured result before
it is stored or compared to limits. In this way, a one-point cali-
bration can be done whereby the whole transfer function of the
channel can be moved up or down. From a software point of
view, this may be a very simple method to vary the charac-
teristics of the measurement channel if the thermal charac-
teristics change. Because it is an 8-bit register, the temperature
resolution is 1癈.
Table 44. External Temperature Offset
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
0*
0*
0*
0*
0*
0*
0*
* Default settings at power-up
Internal Analog Temperature Offset Register (Read/Write)
[Address = 21h]
This register contains the offset value for the internal thermal
voltage output. A twos complement number can be written to
this register, which is then added to the measured result before
it is converted by DAC A. Varying the value in this register has
the effect of varying the temperature span. For example, the
output voltage can represent a temperature span of 128癈 to
+127癈 or even 0癈 to +127癈. In essence, this register changes
the position of 0 V on the temperature scale. Temperatures
other than 128癈 to +127癈 will produce an upper deadband
on the DAC A output. Because it is an 8-bit register, the
temperature resolution is 1癈. The default value is 40癈.
Table 45. Internal Analog Temperature Offset
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
0*
1*
1*
0*
0*
0*
* Default settings at power-up
External Analog Temperature Offset Register (Read/Write)
[Address = 22h]
This register contains the offset value for the external thermal
voltage output. A twos complement number can be written to
this register which is then added to the measured result before it
is converted by DAC B. Varying the value in this register has the
effect of varying the temperature span. For example, the output
voltage can represent a temperature span of 128癈 to +127癈
or even 0癈 to +127癈. In essence, this register changes the
position of 0 V on the temperature scale. Temperatures other
than 128癈 to +127癈 will produce an upper deadband on the
DAC B output. Because it is an 8-bit register, the temperature
resolution is 1癈. The default value is 40癈.
Table 46. External Analog Temperature Offset
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
0*
1*
1*
0*
0*
0*
* Default settings at power-up
V
DD
V
HIGH
Limit Register (Read/Write) [Address = 23h]
This limit register is an 8-bit read/write register that stores the
VDD upper limit, which will cause an interrupt and activate the
INT/INT
output (if enabled). For this to happen, the measured
V
DD
value has to be greater than the value in this register. The
default value is 5.46 V.
Table 47. VDD VHIGH Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
0*
0*
0*
1*
1*
1*
* Default settings at power-up
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