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參數資料
| 型號： | ADUC842BCP32-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| 中文描述： | 8-BIT, FLASH, 8.38 MHz, MICROCONTROLLER, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FRAME, MO-220VLLD2, CSP-56 |
| 文件頁數： | 46/88頁 |
| 文件大小： | 903K |
| 代理商： | ADUC842BCP32-3 |
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ADuC841/ADuC842/ADuC843
SPICON SPI Control Register
Rev. 0 | Page 46 of 88
SFR Address
Power-On Default
Bit Addressable
Table 18. SPICON SFR Bit Designations
Bit No.
Name
7
ISPI
F8H
04H
Yes
Description
SPI Interrupt Bit.
Set by the MicroConverter at the end of each SPI transfer.
Cleared directly by user code or indirectly by reading the SPIDAT SFR.
Write Collision Error Bit.
Set by the MicroConverter if SPIDAT is written to while an SPI transfer is in progress.
Cleared by user code.
SPI Interface Enable Bit.
Set by the user to enable the SPI interface.
Cleared by the user to enable the I
2
C pins, this is not requiredto enable the I
2
C interface if the MSPI bit is set in
CFG841/CFG842. In this case, the I
2
C interface is automatically enabled.
SPI Master/Slave Mode Select Bit.
Set by the user to enable master mode operation (SCLOCK is an output).
Cleared by the user to enable slave mode operation (SCLOCK is an input).
Clock Polarity Select Bit.
Set by the user if SCLOCK idles high.
Cleared by the user if SCLOCK idles low.
Clock Phase Select Bit.
Set by the user if leading SCLOCK edge is to transmit data.
Cleared by the user if trailing SCLOCK edge is to transmit data.
SPI Bit Rate Select Bits.
These bits select the SCLOCK rate (bit rate) in master mode as follows:
SPR1
SPR0
Selected Bit Rate
0
0
f
OSC
/2
0
1
f
OSC
/4
1
0
f
OSC
/8
1
1
f
OSC
/16
In SPI slave mode, i.e., SPIM = 0, the logic level on the external SS pin can be read via the SPR0 bit.
1
The CPOL and CPHA bits should both contain the same values for master and slave devices.
SPIDAT
SPI Data Register
Function
SPIDAT SFR is written by the user to transmit data over the SPI interface or read by user code to
read data just received by the SPI interface.
SFR Address
F7H
Power-On Default
00H
Bit Addressable
No
6
WCOL
5
SPE
4
SPIM
3
CPOL
1
2
CPHA
1
1
0
SPR1
SPR0
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