- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374040 > ADUC848BS32-3 (ANALOG DEVICES INC) MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU PDF資料下載
參數(shù)資料
| 型號(hào)： | ADUC848BS32-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| 中文描述： | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | 14 X 14 MM, PLASTIC, MO-112-AC-1, MQFP-52 |
| 文件頁(yè)數(shù)： | 24/108頁(yè) |
| 文件大小： | 1109K |
| 代理商： | ADUC848BS32-3 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)
ADuC845/ADuC847/ADuC848
SPECIAL FUNCTION REGISTERS (SFRs)
The SFR space is mapped into the upper 128 bytes of internal
data memory space and accessed by direct addressing only. It
provides an interface between the CPU and all on-chip periph-
erals. A block diagram showing the programming model of the
ADuC845/ADuC847/ADuC848 via the SFR area is shown in
Figure 11.
Rev. A | Page 24 of 108
All registers except the program counter (PC) and the four
general-purpose register banks reside in the SFR area. The SFR
registers include control, configuration, and data registers that
provide an interface between the CPU and all on-chip peripherals.
128-BYTE
SPECIAL
FUNCTION
REGISTER
AREA
62-kBYTE
ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE
FLASH/EE PROGRAM
MEMORY
8051
COMPATIBLE
CORE
OTHER ON-CHIP
PERIPHERALS
TEMPERATURE
SENSOR
CURRENT SOURCES
12-BIT DAC
SERIAL I/O
WDT
PSM
TIC
PWM
Σ
-
ADC
4-kBYTE
ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE
FLASH/EE DATA
MEMORY
256 BYTES RAM
2kBYTES XRAM
0
Figure 11. Programming Model
Accumulator SFR (ACC)
ACC is the accumulator register, which is used for math opera-
tions including addition, subtraction, integer multiplication and
division, and Boolean bit manipulations. The mnemonics for
accumulator-specific instructions usually refer to the accumulator
as A.
B SFR (B)
The B register is used with the accumulator for multiplication
and division operations. For other instructions, it can be treated
as a general-purpose scratch pad register.
Data Pointer (DPTR)
The data pointer is made up of three 8-bit registers: DPP (page
byte), DPH (high byte), and DPL (low byte). These provide
memory addresses for internal code and data memory access.
The DPTR can be manipulated as a 16-bit register (DPTR =
DPH, DPL), although INC DPTR instructions automatically
carry over to DPP, or as three independent 8-bit registers (DPP,
DPH, DPL).
The ADuC845/ADuC847/ADuC848 supports dual data
pointers. See the Dual Data Pointers section.
Stack Pointer (SP and SPH)
The SP SFR is the stack pointer, which is used to hold an
internal RAM address called the
top of the stack
. The SP register
is incremented before data is stored during PUSH and CALL
executions. Although the stack can reside anywhere in on-chip
RAM, the SP register is initialized to 07H after a reset. This
causes the stack to begin at location 08H.
As mentioned earlier, the parts offer an extended 11-bit stack
pointer. The 3 extra bits needed to make up the 11-bit stack
pointer are the 3 LSBs of the SPH byte located at B7H. To enable
the SPH SFR, the EXSP (CFG84x.7) bit must be set; otherwise,
the SPH SFR can be neither written to nor read from.
Program Status Word (PSW)
The PSW SFR contains several bits that reflect the current
status of the CPU as listed in Table 5.
SFR Address:
Power-On Default:
Bit Addressable:
Table 5. PSW SFR Bit Designations
Bit No.
Name
7
CY
6
AC
5
F0
4, 3
RS1, RS0
2
OV
1
F1
0
P
D0H
00H
Yes
Description
Carry Flag.
Auxiliary Carry Flag.
General-Purpose Flag.
Register Bank Select Bits.
RS1
RS0
0
0
0
1
1
0
1
1
Overflow Flag.
General-Purpose Flag.
Parity Bit.
Selected Bank
0
1
2
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADUC848BS32-5 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BS62-3 | 10-825944-010 |
| ADUC848BS62-5 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BS8-3 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BS8-5 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC848BS32-5 | 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
| ADUC848BS62-3 | 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 12.85MHZ 3.3V 52MQFP - Bulk 制造商:Analog Devices 功能描述: |
| ADUC848BS62-5 | 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 12.85MHZ 5V 52MQFP - Bulk 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
| ADUC848BS8-3 | 制造商:Analog Devices 功能描述: |
| ADUC848BS8-5 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 52-Pin MQFP 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。