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參數資料
型號: ADV7181B
廠商: Analog Devices, Inc.
英文描述: Multiformat SDTV Video Decoder
中文描述: 標清多格式視頻解碼器
文件頁數: 48/96頁
文件大小: 873K
代理商: ADV7181B
ADV7181B
CGMS Data Registers
Rev. 0 | Page 48 of 96
CGMS1[7:0], Address 0x96 [7:0],
CGMS2[7:0], Address 0x97 [7:0],
CGMS3[7:0], Address 0x98 [7:0]
Figure 32 shows the bit correspondence between the analog
video waveform and the CGMS1/CGMS2/CGMS3 registers.
CGMS3[7:4] are undetermined and should be masked out by
software.
Closed Caption Data Registers
CCAP1[7:0], Address 0x99 [7:0],
CCAP2[7:0], Address 0x9A [7:0]
Figure 33 shows the bit correspondence between the analog
video waveform and the CCAP1/CCAP2 registers.
CCAP1[7] contains the parity bit from the first word.
CCAP2[7] contains the parity bit from the second word.
Refer to the GDECAD Gemstar Decode Ancillary Data Format,
Address 0x4C [0] section.
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
CGMS2[7:0]
CGMS3[3:0]
CGMS1[7:0]
REF
+100 IRE
+70 IRE
0 IRE
–40 IRE
11.2
μ
s
49.1
μ
s
±
0.5
μ
s
CRC SEQUENCE
2.235
μ
s
±
20ns
Figure 32. CGMS Data Extraction
Table 58. CGMS Access Information
Signal Name
CGMS1[7:0]
CGMS2[7:0]
CGMS3[3:0]
Register Location
CGMS 1 [7:0]
CGMS 2 [7:0]
CGMS 3 [3:0]
Address
Register Default Value
Readback Only
Readback Only
Readback Only
150d
151d
152d
0x96
0x97
0x98
0
REFERENCE COLOR BURST
(9 CYCLES)
FREQUENCY = F
= 3.579545MHz
AMPLITUDE = 40 IRE
10.003
μ
s
1
CCAP1[7:0]
(O7 CYCLES
CCAP2[7:0]
2 3 4 5 6 7 0 1 2 3 4 5 6 7
P
A
R
I
T
Y
S
T
A
R
T
P
A
R
I
T
Y
BYTE 1
BYTE 0
33.764
μ
s
10.5
±
0.25
μ
s
12.91
μ
s
27.382
μ
s
50 IRE
40 IRE
0
Figure 33. Closed Caption Data Extraction
Table 59. CCAP Access Information
Signal Name
CCAP1[7:0]
CCAP2[7:0]
Register Location
CCAP 1 [7:0]
CCAP 2 [7:0]
Address
Register Default Value
Readback Only
Readback Only
153d
154d
0x99
0x9A
相關PDF資料
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相關代理商/技術參數
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ADV7181BCP 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:10BIT NTSC/PAL/SECAM VIDEO DECODER I.C. - Bulk
ADV7181BCPZ 制造商:Analog Devices 功能描述:
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