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參數(shù)資料
| 型號(hào)： | CDC9441 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DVD System Clock Synthesizerers(PC時(shí)鐘合成器/驅(qū)動(dòng)器(SDRAM 時(shí)鐘支持)) |
| 中文描述： | DVD系統(tǒng)時(shí)鐘Synthesizerers（電腦時(shí)鐘合成器/驅(qū)動(dòng)器（SDRAM的時(shí)鐘支持）） |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大小： | 275K |
| 代理商： | CDC9441 |
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CDC9441
PC CLOCK SYNTHESIZER/DRIVER
WITH SDRAM CLOCK SUPPORT
SCAS578 – AUGUST 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Clock Generation for Intel 440LX Chipset
Four CPU Clock Outputs With
Programmable Frequency
Twelve SDRAM Clock Outputs
Seven PCI Clock Outputs
One 14.318-MHz Reference Clock Output
All Output Clock Frequencies Derived From
a Single 14.31818-MHz Crystal Input
Internal Loop Filter for Phase-Lock Loop
(PLL)
Selectable Desktop or Mobile Function
description
The CDC9441 is a system clock synthesizer for
use in personal computer systems utilizing the
Intel 440LX chipset. An integrated crystal
oscillator generates a 14.318-MHz reference
frequency, while an integrated PLL generates a
selectable CPU clock frequency from a
14.31818-MHz crystal input.
The CDC9441 provides four 2.5-V copies of the
CPU clock, 12 3.3-V copies of the CPU frequency
for use by SDRAM, seven 3.3-V copies of one-half
the CPU frequency for PCI, two 2.5-V copies of
the 14.318-MHz clock for APIC use, and one
3.3-V copy of the 14.318-MHz output for use as an
ISA reference clock.
CPU output frequencies are selectable to either 60 MHz or 66.67 MHz. The output frequency is determined by
the SEL control input. When SEL = L, the nominal CPU clock output frequency is 60 MHz. When SEL = H, the
nominal CPU clock output frequency is 66.67 MHz. SEL has an integrated pullup resistor, so the default CPU
output frequency is 66.67 MHz.
Two modes of operation are offered, desktop and mobile. The device configuration is selected via the MODE
control input. When MODE = H, the device is in the desktop configuration. When MODE = L, the device is in
the mobile configuration. In the desktop configuration, pins 31, 29, and 28 are outputs SDRAM5, SDRAM6, and
SDRAM7, respectively. However, when in the mobile configuration, pins 31, 29, and 28 are power-down enable
(PWRDN), CPU clock bank-enable (CPUEN), and PCI bank-enable (PCIEN) inputs, respectively.
The CDC9441 also provides a serial interface bus for additional control of the device. Each output can be
individually enabled or disabled by setting the appropriate control bits within the serial bus register space. A PLL
bypass (TEST) mode and output 3-state also can be enabled by setting the appropriate bits in the serial bus
register space.
The CDC9441 is characterized for operation from 0
°
C to 70
°
C.
Copyright
1996, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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V
CC
REF0
GND
XIN
XOUT
V
CCO3
PCI_F
PCI0
GND
PCI1
PCI2
PCI3
PCI4
V
CCO3
PCI5
GND
SDRAM11
SDRAM10
V
CCO3
SDRAM9
SDRAM8
GND
SDATA
SCLOCK
V
CCO2
IOAPIC0
IOAPIC1
GND
CPU0
CPU1
V
CCO2
CPU2
CPU3
GND
SDRAM0
SDRAM1
V
CCO3
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5/PWRDN
V
CCO3
SDRAM6/CPUEN
SDRAM7/PCIEN
GND
SEL
MODE
P
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| CDC9841 | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9841DW | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9841DWR | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9842 | PC Motherboard Clock Sythesizer/Drivers with 3 - State Outputs(PC母板時(shí)鐘合成器/驅(qū)動(dòng)器(三態(tài)輸出)) |
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| CDC950 | 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS |
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| CDC950DGGG4 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Fully Int Lo-Jitter Crstal Osc Clock Gen RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGRG4 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Fully Int Lo-Jitter Crstal Osc Clock Gen RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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