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參數資料
| 型號： | FDU6696 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | 30V N-Channel PowerTrench MOSFET |
| 中文描述： | 13 A, 30 V, 0.008 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-251AA |
| 封裝： | IPAK-3 |
| 文件頁數： | 2/5頁 |
| 文件大小： | 109K |
| 代理商： | FDU6696 |
FDD6696/FDU6696 Rev. D (W)
D
R
P
DS(ON)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min
Typ
Max
Unit
s
Drain-Source Avalanche Ratings
(Note 2)
E
AS
Drain-Source Avalanche Energy
I
AS
Drain-Source Avalanche Current
Off Characteristics
BV
DSS
Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
Single Pulse, V
DD
= 15 V, I
D
=13A
165
13
mJ
A
Drain–Source Breakdown
V
GS
= 0 V,
I
D
= 250
μ
A
30
V
Breakdown Voltage Temperature
I
D
= 250
μ
A, Referenced to 25
°
C
23
mV/
°
C
V
DS
= 24 V,
V
GS
=
±
16 V,
V
GS
= 0 V
V
DS
= 0 V
10
μ
A
nA
±
100
(Note 2)
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
I
D
= 250
μ
A
1
2
–5
3
V
Gate Threshold Voltage
mV/
°
C
V
GS
= 10 V,
V
GS
= 4.5 V,
V
GS
= 10 V, I
D
= 13 A, T
J
=125
°
C
V
DS
= 5 V,
I
D
= 13 A
I
D
= 13 A
I
D
= 12 A
6.7
8.6
10.2
51
8.0
10.7
15.0
m
g
FS
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
Switching Characteristics
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
Forward Transconductance
S
1715
410
180
1.3
pF
pF
pF
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV,
f = 1.0 MHz
(Note 2)
13
4
27
17
17
5
6
23
9
43
31
24
ns
ns
ns
ns
nC
nC
nC
V
DD
= 15 V,
V
GS
= 10 V,
I
D
= 13 A,
R
GEN
= 6
V
DS
= 15V,
V
GS
= 5 V
I
D
= 13 A,
13
A
V
SD
V
GS
= 0 V,
I
S
= 13 A
(Note 2)
0.8
1.2
V
27
15
nS
nC
I
F
= 13 A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) R
JA
= 40°C/W when mounted on
a 1in
2
pad of 2 oz copper
b) R
= 96°C/W when mounted
on a minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
3.
Maximum current is calculated as:
current limitation is 21A
where P
D
is maximum power dissipation at T
C
= 25°C and R
DS(on)
is at T
J(max)
and V
GS
= 10V. Package
F
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