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參數(shù)資料
型號： GS1559
廠商： Gennum Corporation
英文描述： GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver
中文描述： GS1559的HD - LINX進程，商標第二多速率解串器與環(huán)通電纜驅(qū)動器
文件頁數(shù)： 9/74頁
文件大小： 686K
代理商： GS1559
GS1559 Data Sheet
30572 - 4
July 2005
9 of 74
C8
YANC
Synchronous
with PCLK
Output
STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to indicate the presence of ancillary data in the video stream.
HD Mode (SD/HD = LOW)
The YANC signal will be HIGH when the device has detected VANC or
HANC data in the luma video stream and LOW otherwise.
SD Mode (SD/HD = LOW)
For 20-bit demultiplexed data (20bit/10bit = HIGH), the YANC signal will be
HIGH when VANC or HANC data is detected in the luma video stream and
LOW otherwise.
For 10-bit multiplexed data (20bit/10bit = LOW), the YANC signal will be
HIGH when VANC or HANC data is detected anywhere in the data stream
and LOW otherwise.
D1, E1
DDI1, DDI1
Analog
Input
Differential input pair for serial digital input 1.
D4
IP_SEL
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select DDI1 / DDI1 or DDI2 / DDI2 as the serial digital input signal,
and CD1 or CD2 as the carrier detect input signal.
When set HIGH, DDI1 / DDI1 is selected as the serial digital input and
CD1 is selected as the carrier detect input signal.
When set LOW, DDI2 / DDI2 serial digital input and CD2 carrier detect
input signal is selected.
D5
DVB_ASI
Non
Synchronous
Input /
Output
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
This pin will be an input set by the application layer in slave mode, and will
be an output set by the device in master mode.
Master Mode (MASTER/SLAVE = HIGH)
The DVB_ASI signal will be HIGH only when the device has locked to a
DVB-ASI compliant data stream. It will be LOW otherwise.
Slave Mode (MASTER/SLAVE = LOW)
When set HIGH in conjunction with SD/HD = HIGH and SMPTE_BYPASS
= LOW, the device will be configured to operate in DVB-ASI mode.
When set LOW, the device will not support the decoding or word alignment
of received DVB-ASI data.
D6
LOCKED
Synchronous
with PCLK
Output
STATUS SIGNAL OUTPUT
Signal levels are LVCMOS / LVTTL compatible.
The LOCKED signal will be HIGH whenever the device has correctly
received and locked to SMPTE compliant data in SMPTE mode or
DVB-ASI compliant data in DVB-ASI mode.
It will be LOW otherwise.
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
Description
相關(guān)PDF資料
PDF描述
GS1559-CB GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver
GS1559-CBE2 GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver
GS2905 500mA CMOS LDO Voltage Regulator
GS2905X15 500mA CMOS LDO Voltage Regulator
GS2905X18 500mA CMOS LDO Voltage Regulator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS1559_08 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver
GS1559-CB 制造商:Semtech Corporation 功能描述: 制造商:Semtech Corporation 功能描述:HD/SD/ASI Receiver
GS1559CBE2 制造商:Gennum Corporation 功能描述:DESERIALISER HD/SDI/ASI W/DRV 100BGA 制造商:Gennum Corporation 功能描述:DESERIALISER, HD/SDI/ASI, W/DRV, 100BGA
GS1559-CBE2 功能描述:RF, RFID, WIRELESS RoHS:是 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:* 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:管件
GS1560 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Voltage Controlled Oscillator
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