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參數資料
型號: GS88218
廠商: GSI TECHNOLOGY
英文描述: 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
中文描述: 為512k × 18,256K × 36 9Mb以上SCD的/雙氰胺同步突發靜態存儲器
文件頁數: 19/37頁
文件大小: 751K
代理商: GS88218
GS88218/36BB/D-333/300/250/200/150
Rev: 1.02 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
19/37
2002, GSI Technology
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
AC Electrical Characteristics
Parameter
Symbol
-333
-300
-250
-200
-150
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Pipeline
Clock Cycle Time
tKC
3.0
3.3
4.0
5.0
6.7
ns
Clock to Output Valid
tKQ
2.5
2.5
2.5
3.0
3.8
ns
Clock to Output Invalid
tKQX
1.5
1.5
1.5
1.5
1.5
ns
Clock to Output in Low-Z
tLZ
1
1.5
1.5
1.5
1.5
1.5
ns
Setup time
tS
1.0
1.0
1.2
1.4
1.5
ns
Hold time
tH
0.1
0.1
0.2
0.4
0.5
ns
Flow
Through
Clock Cycle Time
tKC
4.5
5.0
5.5
6.5
7.5
ns
Clock to Output Valid
tKQ
4.5
5.0
5.5
6.5
7.5
ns
Clock to Output Invalid
tKQX
2.0
2.0
2.0
2.0
2.0
ns
Clock to Output in Low-Z
tLZ
1
2.0
2.0
2.0
2.0
2.0
ns
Setup time
tS
1.3
1.4
1.5
1.5
1.5
ns
Hold time
tH
0.3
0.4
0.5
0.5
0.5
ns
Clock HIGH Time
tKH
1.0
1.0
1.3
1.3
1.5
ns
Clock LOW Time
tKL
1.2
1.2
1.5
1.5
1.7
ns
Clock to Output in
High-Z
tHZ
1
1.5
2.5
1.5
2.5
1.5
2.5
1.5
3.0
1.5
3.0
ns
G to Output Valid
tOE
2.5
2.5
2.5
3.0
3.8
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
ns
G to output in High-Z
tOHZ
1
2.5
2.5
2.5
3.0
3.8
ns
ZZ setup time
tZZS
2
5
5
5
5
5
ns
ZZ hold time
tZZH
2
1
1
1
1
1
ns
ZZ recovery
tZZR
20
20
20
20
20
ns
相關PDF資料
PDF描述
GS88218BB-150 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88218BB-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-200 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
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