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參數資料
型號: GS88218
廠商: GSI TECHNOLOGY
英文描述: 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
中文描述: 為512k × 18,256K × 36 9Mb以上SCD的/雙氰胺同步突發靜態存儲器
文件頁數: 29/37頁
文件大小: 751K
代理商: GS88218
GS88218/36BB/D-333/300/250/200/150
Rev: 1.02 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
29/37
2002, GSI Technology
Typically, the Boundary Scan Register is loaded with the desired pattern of data with the SAMPLE/PRELOAD command.
Then the EXTEST command is used to output the Boundary Scan Register’s contents, in parallel, on the RAM’s data output
drivers on the falling edge of TCK when the controller is in the Update-IR state.
Alternately, the Boundary Scan Register may be loaded in parallel using the EXTEST command. When the EXTEST instruc-
tion is selected, the sate of all the RAM’s input and I/O pins, as well as the default values at Scan Register locations not asso-
ciated with a pin, are transferred in parallel into the Boundary Scan Register on the rising edge of TCK in the Capture-DR
state, the RAM’s output pins drive out the value of the Boundary Scan Register location with which each output pin is associ-
ated.
IDCODE
The IDCODE instruction causes the ID ROM to be loaded into the ID register when the controller is in Capture-DR mode and
places the ID register between the TDI and TDO pins in Shift-DR mode. The IDCODE instruction is the default instruction
loaded in at power up and any time the controller is placed in the Test-Logic-Reset state.
SAMPLE-Z
If the SAMPLE-Z instruction is loaded in the instruction register, all RAM outputs are forced to an inactive drive state (high-
Z) and the Boundary Scan Register is connected between TDI and TDO when the TAP controller is moved to the Shift-DR
state.
RFU
These instructions are Reserved for Future Use. In this device they replicate the BYPASS instruction.
相關PDF資料
PDF描述
GS88218BB-150 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88218BB-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-200 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
相關代理商/技術參數
參數描述
GS88218CB-200 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200I 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200IV 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200V 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-250 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 5.5NS/2.5NS 119FPBGA - Trays
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