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參數資料
| 型號： | GS9092-CNE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| 中文描述： | GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內 |
| 文件頁數： | 30/58頁 |
| 文件大小： | 608K |
| 代理商： | GS9092-CNE3 |
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GS9092 Data Sheet
28202 - 2
September 2005
30 of 58
When there are existing ancillary data packets present in the video data stream,
the device will append the ancillary data to the existing data only when the
ANC_SAV bit is set LOW. In this case, all existing ancillary data must be
contiguous after the EAV. If data is not contiguous, the ancillary data to be inserted
will be written at the first available space where the video is set to blanking levels.
When ANC_SAV is set HIGH, any data present after the SAV will be overwritten.
To overwrite existing ancillary data, the ANC_DATA_REPLACE bit of the
FIFO_EMPTY_OFFSET register must be set HIGH. When this bit is set HIGH,
existing ancillary data will be replaced with the data to be inserted and the
remainder of the line will be set to blanking levels. The device will replace ancillary
data on the line of insertion only. Existing ancillary data on other lines will not be
replaced with blanking levels.
NOTE: If the ANC_SAV and ANC_DATA_REPLACE bits are both set HIGH, and
if ancillary data is inserted on an active picture line, the remainder of the active line
will be set to blanking levels.
Ancillary Data Readback Mode
By default, when the FIFO is in ancillary data insertion mode, the application layer
can only write ancillary data into the FIFO. However, if ANC_DATA_RDBACK is
set HIGH (bit 13 of address 06h), the GS9092 will discontinue inserting ancillary
data into the data stream and the host interface may read the ancillary data
programmed into that half of the FIFO.
3.3.3.2 Clearing the ANC Data FIFO
When switching to ANC FIFO mode, the user must follow one of the 2 methods
below to ensure that the FIFO is fully cleared.
Clearing ANC FIFO Method 1:
1. Enable ANC FIFO mode (write 10b into the FIFO_MODE register).
2. Wait for ANC_FIFO_READY bit to be asserted.
3. Toggle (LOW-to-HIGH-to-LOW) ANC_DATA_SWITCH bit (bit 12 of
IO_CONFIG register) twice.
Clearing ANC FIFO Method 2:
1. Power on device.
2. Set FIFO_EN pin HIGH.
3. Enable ANC FIFO mode (write 10b into the FIFO_MODE register).
4. Set FIFO_EN pin LOW.
5. Set FIFO_EN pin HIGH.
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