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參數資料
| 型號： | ISP1181ADGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus peripheral controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48 |
| 文件頁數： | 20/70頁 |
| 文件大小： | 341K |
| 代理商： | ISP1181ADGG |
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
20 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11. Suspend and resume
11.1 Suspend conditions
The ISP1181A detects a USB suspend status when a constant idle state is present
on the USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500
μ
A
of current. This is achieved by shutting down power to system components or
supplying them with a reduced voltage.
The steps leading up to suspend status are as follows:
1. On detecting a wakeup-to-suspend transition, the ISP1181A sets bit SUSPND in
the Interrupt register. This will generate an interrupt if bit IESUSP in the Interrupt
Enable register is set.
2. When the firmware detects a suspend condition, it must prepare all system
components for the suspend state:
a. All signals connected to the ISP1181A must enter appropriate states to meet
the power consumption requirements of the suspend state.
b. All input pins of the ISP1181A must have a CMOS LOW or HIGH level.
3. In the interrupt service routine, the firmware must check the current status of the
USB bus. When bit BUSTATUS in the Interrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
4. To meet the suspend current requirements for a bus-powered device, the internal
clocks must be switched off by clearing bit CLKRUN in the Hardware
Configuration register.
5. When the firmware has set and cleared bit GOSUSP in the Mode register, the
ISP1181A enters the suspend state. In powered-off application, the ISP1181A
asserts output SUSPEND and switches off the internal clocks after 2 ms.
Figure 6
shows a typical timing diagram.
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1181B | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BBS | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BDGG | Full-speed Universal Serial Bus peripheral controller |
| ISP1181 | Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件) |
| ISP1181DGG | INDUCTOR 4.7NH +-.3NH 0402 SMD |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1181ADGG,112 | 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181ADGG,118 | 功能描述:USB 接口集成電路 USB 1.1 ADV. DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181ADGGTM | 功能描述:IC USB HOST CTRL FLL-SPD 48TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1181B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181BBS | 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB PERIPHERAL SMD 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 48HVQFN |
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