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參數資料
| 型號： | ISP1562 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Hi-Speed Universal Serial Bus PCI Host Controller |
| 中文描述： | 高速通用串行總線PCI主機控制器 |
| 文件頁數： | 19/98頁 |
| 文件大小： | 442K |
| 代理商： | ISP1562 |
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9397 750 14223
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
19 of 98
Philips Semiconductors
ISP1562
USB PCI Host Controller
The Class Code register is divided into three byte-size fields. The upper byte is a base
class code that broadly classifies the type of function the device performs. The middle
byte is a sub-class code that identifies more specifically the function of the device. The
lower byte identifies a specific register-level programming interface, if any, so that
device-independent software can interact with the device.
[1]
X is 1h for OHCI1 and OHCI2; X is 2h for EHCI.
8.2.1.7
CacheLine Size register
The CacheLine Size register is a read and write single-byte register that specifies the
system CacheLine size in units of DWords. This register must be implemented by master
devices that can generate the Memory Write and Invalidate command. The value in this
register is also used by master devices to determine whether to use Read, Read Line or
Read Multiple command to access the memory.
Slave devices that want to allow memory bursting using a CacheLine-wrap addressing
mode must implement this register to know when a burst sequence wraps to the
beginning of the CacheLine.
This field must be initialized to logic 0 on activation of RST#.
Table 13
shows the bit
description of the CacheLine Size register.
Table 11:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Class Code register (address 09h) bit allocation
23
22
21
20
19
18
17
16
BCC[7:0]
0Ch
R
15
R
14
R
13
R
12
R
11
R
10
R
9
R
8
SCC[7:0]
03h
R
7
R
6
R
5
R
4
R
3
R
2
R
1
R
0
RLPI[7:0]
X0h
[1]
R
R
R
R
R
R
R
R
Table 12:
Bit
23 to 16
Class Code register (address 09h) bit description
Symbol
Description
BCC[7:0]
Base Class Code
: 0Ch is the base class code assigned to this byte. It
implies a serial bus controller.
SCC[7:0]
Sub-Class Code
: 03h is the sub-class code assigned to this byte. It
implies the USB Host Controller.
RLPI[7:0]
Register-Level Programming Interface
: 10h is the programming
interface code assigned to OHCI, which is USB 1.1 specification
compliant. 20h is the programming interface code assigned to EHCI,
which is USB 2.0 specification compliant.
15 to 8
7 to 0
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1562BE | Hi-Speed Universal Serial Bus PCI Host Controller |
| ISP1581 | Universal Serial Bus 2.0 high-speed interface device |
| ISP1581BD | Universal Serial Bus 2.0 high-speed interface device |
| ISP1582 | Hi-Speed Universal Serial Bus peripheral controller |
| ISP1582BS | Hi-Speed Universal Serial Bus peripheral controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1562BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
| ISP1562BE,518 | 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BE,551 | 功能描述:USB 接口集成電路 USB 2.0 PCI HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BE,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1562BEGA | 功能描述:IC USB HOST CTRL HI-SPD 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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